參數(shù)資料
型號(hào): XRT86VL34_07
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 71/175頁
文件大?。?/td> 904K
代理商: XRT86VL34_07
XRT86VL34
66
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
T
ABLE
49: R
ECEIVE
S
A
4 R
EGISTER
(RSA4R) H
EX
A
DDRESS
: 0
XN
13B
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
RxSa4[7:0]
RO
00000000
Received Sa4 Sequence
The content of this register stores the Sa 4 bits in the most recently
received CRC-4 multiframe. This register is updated when the entire
multiframe is received.
This register will show the contents of the received Sa4 bits if data
link selects Sa4 bit for reception. (i.e.RxSa4ENB bit in register
0xn10Ch = 1).
Bit 7 of this register indicates the received Sa4 bit in frame 2 of the
CRC-4 multiframe, and bit 6 of this register indicates the received
Sa4 bit in frame 4 of the CRC-4 multiframe,...etc.
T
ABLE
50: R
ECEIVE
S
A
5 R
EGISTER
(RSA5R) H
EX
A
DDRESS
: 0
XN
13C
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
RxSa5[7:0]
RO
00000000
Received Sa5 Sequence
The content of this register stores the Sa 5 bits in the most recently
received CRC-4 multiframe. This register is updated when the entire
multiframe is received.
This register will show the contents of the received Sa5 bits if data
link selects Sa5 bit for reception. (i.e.RxSa5ENB bit in register
0xn10Ch = 1).
Bit 7 of this register indicates the received Sa5 bit in frame 2 of the
CRC-4 multiframe, and bit 6 of this register indicates the received
Sa5 bit in frame 4 of the CRC-4 multiframe,...etc.
T
ABLE
51: R
ECEIVE
S
A
6 R
EGISTER
(RSA6R) H
EX
A
DDRESS
: 0
X
n13D
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
RxSa6[7:0]
RO
00000000
Received Sa6 Sequence
The content of this register stores the Sa 6 bits in the most recently
received CRC-4 multiframe. This register is updated when the entire
multiframe is received.
This register will show the contents of the received Sa6 bits if data
link selects Sa6 bit for reception. (i.e.RxSa6ENB bit in register
0xn10Ch = 1).
Bit 7 of this register indicates the received Sa6 bit in frame 2 of the
CRC-4 multiframe, and bit 6 of this register indicates the received
Sa6 bit in frame 4 of the CRC-4 multiframe,...etc.
相關(guān)PDF資料
PDF描述
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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XRT86VL34IB 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4 IND FULL DPLX FIFO TWO-FRAME, CAS, CCS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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XRT86VL38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL38_07 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION