參數(shù)資料
型號(hào): XRT86VL34_07
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 86/175頁
文件大?。?/td> 904K
代理商: XRT86VL34_07
XRT86VL34
81
QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
REV. V1.2.0
N
OTE
:
The default value for register address 0xn340 = 0x01, 0xn341-0xn34F = 0xD0, 0xn350 = 0xB3, 0xn351-0xn35F =
0xD0
1
TxSIGSRC[1]
R/W
See Note
Channel signaling control
These bits determine the source for signaling information. The table
below presents the different sources for signaling information corre-
sponding to different settings of these two bits.
0
TxSIGSRC[0]
R/W
See Note
T
ABLE
64: T
RANSMIT
S
IGNALING
C
ONTROL
R
EGISTER
0-31 (TSCR 0-31) H
EX
A
DDRESS
: 0
X
n340
TO
0
XN
35F
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
T
X
SIGSRC[1:0]
S
IGNALING
SOURCE
SELECTED
00
Signaling data is inserted from input PCM
data (TxSERn pin)
01
Signaling data is inserted from this register
(TSCRs).
10
Signaling data is inserted from the transmit
Overhead input pin (TxOH_n) if XRT86VL34
is configured in the base rate configuration
and if the Transmit Signaling Interface bit is
disabled. (i.e. TxMUXEN bit = 0, TxI-
MODE[1:0] = 00, and TxFr2048 bit = 0 in the
Transmit Interface Control Register (TICR)
Register 0xn120).
If the Transmit Signaling Interface bit is
enabled (i.e. TxFr2048 bit = 1 in the Trans-
mit Interface Control Register (TICR) Regis-
ter 0xn120), signaling data will be inserted
from the Transmit Signaling input pin
(TxSIG_n)
11
No signaling data is inserted into the input
PCM data. Setting these two bits to ‘11’ will
configure the xyxx bits only, where x bits are
inserted from this register (TSCR) and y bit
reflects the alarm condition.
相關(guān)PDF資料
PDF描述
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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