參數資料
型號: XRT86VL34_07
廠商: Exar Corporation
元件分類: 通信及網絡
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數: 27/175頁
文件大小: 904K
代理商: XRT86VL34_07
XRT86VL34
22
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
T
ABLE
6: T
RANSMIT
S
IGNALING
AND
D
ATA
L
INK
S
ELECT
R
EGISTER
(TSDLSR) H
EX
A
DDRESS
:0
X
n10A
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
TxSa8ENB
R/W
0
Transmit Sa8 Enable
This bit specifies if the Sa8 bits (bit 7 within timeslot 0 of non-FAS frames) will be
involved in the transmission of Data Link Information.
0 = Sa8 will NOT be used to transport Data Link Information. Sa8 bits will be set to
“1” within the outbound E1 data-stream if the Sa8 bits are inserted from the trans-
mit serial input.
1 = Sa8 WILL be used to transport Data Link Information.
N
OTE
:
Sa8 bits can be inserted from either the transmit serial input or register
depending on the Transmit SA Select Register (Register Address:
0xn130) setting. The data link interface uses Sa8 bits for transmission
only if Data Link source is from HDLC controller (DLSRC = b01 from
Register 0xn109) and if Sa8 bits are inserted from the transmit serial input
(TxSa8SEL = 0 from Register 0xn130).
6
TxSa7ENB
R/W
0
Transmit Sa7 Enable
This bit specifies if the Sa7 bits (bit 6 within timeslot 0 of non-FAS frames) will be
involved in the transmission of Data Link Information.
0 = Sa7 will NOT be used to transport Data Link Information. Sa7 bits will be set to
“1” within the outbound E1 data-stream if the Sa7 bits are inserted from the trans-
mit serial input.
1 = Sa7 WILL be used to transport Data Link Information.
N
OTE
:
Sa7 bits can be inserted from either the transmit serial input or register
depending on the Transmit SA Select Register (Register Address:
0xn130) setting. The data link interface uses Sa8 bits for transmission
only if Data Link source is from HDLC controller (DLSRC = b01 from
Register 0xn109) and if Sa7 bits are inserted from the transmit serial input
(TxSa7SEL = 0 from Register 0xn130).
5
TxSa6ENB
R/W
0
Transmit Sa6 Enable
This bit specifies if the Sa6 bits (bit 5 within timeslot 0 of non-FAS frames) will be
involved in the transmission of Data Link Information.
0 = Sa6 will NOT be used to transport Data Link Information. Sa6 bits will be set to
“1” within the outbound E1 data-stream if the Sa6 bits are inserted from the trans-
mit serial input.
1 = Sa6 WILL be used to transport Data Link Information.
N
OTE
:
Sa6 bits can be inserted from either the transmit serial input or register
depending on the Transmit SA Select Register (Register Address:
0xn130) setting. The data link interface uses Sa6 bits for transmission
only if Data Link source is from HDLC controller (DLSRC = b01 from
Register 0xn109) and if Sa6 bits are inserted from the transmit serial input
(TxSa6SEL = 0 from Register 0xn130).
4
TxSa5ENB
R/W
0
Transmit Sa5 Enable
This bit specifies if the Sa5 bits (bit 4 within timeslot 0 of non-FAS frames) will be
involved in the transmission of Data Link Information.
0 = Sa5 will NOT be used to transport Data Link Information. Sa5 bits will be set to
“1” within the outbound E1 data-stream if the Sa5 bits are inserted from the trans-
mit serial input.
1 = Sa5 WILL be used to transport Data Link Information.
Sa5 bits can be inserted from either the transmit serial input or register depending
on the Transmit SA Select Register (Register Address: 0xn130) setting. The data
link interface uses Sa5 bits for transmission only if Data Link source is from HDLC
controller (DLSRC = b01 from Register 0xn109) and if Sa5 bits are inserted from
the transmit serial input (TxSa5SEL = 0 from Register 0xn130).
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