參數(shù)資料
型號(hào)： 28F004B3
廠商： Intel Corp.
英文描述： 3 Volt Advanced Boot Block Flash Memory(3 V,4M位高級(jí)引導(dǎo)塊閃速存儲(chǔ)器)
中文描述： 3伏高級(jí)啟動(dòng)塊閃存（3伏，4分位高級(jí)引導(dǎo)塊閃速存儲(chǔ)器）
文件頁(yè)數(shù)： 23/53頁(yè)
文件大小： 300K
代理商： 28F004B3
E
3.5.1
28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3
23
PRELIMINARY
ACTIVE POWER
With CE# at a logic-ow level and RP# at a logic-
high level, the device is in the active mode. Refer to
the DC Characteristic tables for I
CC
current values.
Active power is the largest contributor to overall
system power consumption. Minimizing the active
current could have a profound effect on system
power consumption, especially for battery-operated
devices.
3.5.2
AUTOMATIC POWER SAVINGS (APS)
Automatic Power Savings provides low-power
operation during read mode. After data is read from
the memory array and the address lines are
quiescent, APS circuitry places the device in a
mode where typical current is comparable to I
CCS
.,
The flash stays in this static state with outputs valid
until a new location is read.
3.5.3
STANDBY POWER
With CE# at a logic-high level (V
IH
) and device in
read mode, the flash memory is in standby mode,
which disables much of the device’s circuitry and
substantially reduces power consumption. Outputs
are placed in a high
-
impedance state independent
of the status of the OE# signal. If CE# transitions to
a logic
-
high level during erase or program
operations, the device will continue to perform the
operation and consume corresponding active power
until the operation is completed.
System engineers should analyze the breakdown of
standby time versus active time and quantify the
respective power consumption in each mode for
their specific application. This will provide a more
accurate measure of application
-
specific power and
energy requirements.
3.5.4
DEEP POWER-DOWN MODE
The deep power-down mode is activated when RP#
= V
IL
(GND
±
0.2 V). During read modes, RP#
going low de-selects the memory and places the
outputs in a high impedance state. Recovery from
deep power-down requires a minimum time of t
PHQV
(see
AC Characteristics
—Read Operations
).
During program or erase modes, RP# transitioning
low will abort the in-progress operation. The
memory contents of the address being programmed
or the block being erased are no longer valid as the
data integrity has been compromised by the abort.
During deep power-down, all internal circuits are
switched to a low power savings mode (RP#
transitioning to V
IL
or turning off power to the device
clears the status register).
3.6
Power-Up/Down Operation
The device is protected against accidental block
erasure or programming during power transitions.
Power supply sequencing is not required, since
the
device is indifferent as to which power supply, V
PP
or V
CC
, powers-up first.
3.6.1
RP# CONNECTED TO SYSTEM
RESET
The use of RP# during system reset is important
with automated program/erase devices since the
system expects to read from the flash memory
when it comes out of reset. If a CPU reset occurs
without a flash memory reset, proper CPU
initialization will not occur because the flash
memory may be providing status information
instead of array data. Intel recommends connecting
RP# to the system CPU RESET# signal to allow
proper CPU/flash initialization following system
reset.
System designers must guard against spurious
writes when V
CC
voltages are above V
LKO
. Since
both WE# and CE# must be low for a command
write, driving either signal to V
IH
will
inhibit writes to
the device. The CUI architecture provides additional
protection since alteration of memory contents can
only occur after successful completion of the two-
step command sequences. The device is also
disabled until RP# is brought to V
IH
, regardless of
the state of its control inputs. By holding the device
in reset (RP# connected to system POWERGOOD)
during power-up/down, invalid bus conditions during
power-up can be masked, providing yet another
level of memory protection.
相關(guān)PDF資料
PDF描述
28F004S3 BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
28F004S5 BYTE-WIDE SMART 5 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
28F004SC BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
28F008B3 SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
28F008C3 3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F004B5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SMART 5 BOOT BLOCK. FLASH MEMORY FAMILY 2. 4. 8 MBIT
28F004BE-T/B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-MBIT (256K X 16. 512K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
28F004BL-B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-MBlT (256K x 16. 512K x 8) LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY
28F004BL-T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-MBlT (256K x 16. 512K x 8) LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY
28F004BV 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
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