Functional Description
5-68
Intel
82801BA ICH2 Datasheet
5.12
Power Management (D31:F0)
Features
ACPI Power and Thermal Management Support
— ACPI 24-Bit Timer
— Software initiated throttling of processor performance for Thermal and Power Reduction
— Hardware Override to throttle processor performance if system too hot
— SCI and SMI# Generation
PCI PME# Signal for Wake Up from Low-Power states
System Clock Control
— ACPI C2 state: Stop-Grant state (using STPCLK# signal) halts processor’s instruction
stream
System Sleeping State Control
— ACPI S1 state: Like C2 state (only STPCLK# active, and SLP# optional)
— ACPI S3 state - Suspend to RAM (STR)
— ACPI S4 state - Suspend-to-Disk (STD)
— ACPI G2/S5 state - Soft Off (SOFF)
— Power Failure Detection and Recovery
Streamlined Legacy Power Management Support for APM-Based Systems
5.12.1
ICH2 and System Power States
Table 5-37
shows the power states defined for ICH2-based platforms. The state names generally
match the corresponding ACPI states.
Table 5-37. General Power States for Systems using ICH2
State/
Substates
Legacy Name / Description
G0/S0/C0
Full On:
Processor operating. Individual devices may be shut down to save power. The
different processor operating levels are defined by Cx states, as shown in
Table 5-38
. Within
the C0 state, the ICH2 can throttle the STPCLK# signal to reduce power consumption. The
throttling can be initiated by software or by the THRM# input signal.
G0/S0/C1
Auto-Halt:
Processor has executed a AutoHalt instruction and is not executing code. The
processor snoops the bus and maintains cache coherency.
G0/S0/C2
Stop-Grant:
The STPCLK# signal goes active to the processor. The processor performs a
Stop-Grant cycle, halts its instruction stream, and remains in that state until the STPCLK#
signal goes inactive. In the Stop-Grant state, the processor snoops the bus and maintains
cache coherency.
G1/S1
Stop-Grant:
Similar to G0/S0/C2 state. ICH2 also has the option to assert the CPUSLP# signal
to further reduce processor power consumption.
Note: The behavior for this state is slightly different when supporting iA64 processors.
G1/S3
Suspend-To-RAM (STR):
The system context is maintained in system DRAM, but power is
shut off to non-critical circuits. Memory is retained and refreshes continue. All clocks stop
except RTC clock.
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