xxii
82801BA ICH2
Datasheet
Tables
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
3-1
3-2
3-3
3-4
3-5
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
Industry Specifications..................................................................................1-1
PCI Devices and Functions ..........................................................................1-3
Hub Interface Signals ...................................................................................2-1
LAN Connect Interface Signals.....................................................................2-1
EEPROM Interface Signals ..........................................................................2-2
Firmware Hub Interface Signals ...................................................................2-2
PCI Interface Signals....................................................................................2-2
IDE Interface Signals....................................................................................2-4
LPC Interface Signals...................................................................................2-6
Interrupt Signals............................................................................................2-6
USB Interface Signals...................................................................................2-7
Power Management Interface Signals..........................................................2-7
Processor Interface Signals..........................................................................2-8
SM Bus Interface Signals .............................................................................2-9
System Management Interface Signals........................................................2-9
Real Time Clock Interface ..........................................................................2-10
Other Clocks...............................................................................................2-10
Miscellaneous Signals................................................................................2-10
AC’97 Link Signals......................................................................................2-11
General Purpose I/O Signals......................................................................2-11
Power and Ground Signals.........................................................................2-12
Functional Strap Definitions........................................................................2-12
Test Mode Selection...................................................................................2-13
ICH2 Power Planes ......................................................................................3-1
Integrated Pull-Up and Pull-Down Resistors ................................................3-1
IDE Series Termination Resistors.................................................................3-2
Power Plane and States for Output and I/O Signals.....................................3-3
Power Plane for Input Signals ......................................................................3-5
Type 0 Configuration Cycle Device Number Translation..............................5-4
EEPROM Format........................................................................................5-16
EEPROM Word Field Descriptions.............................................................5-17
LPC Cycle Types Supported ......................................................................5-20
Start Field Bit Definitions ............................................................................5-20
Cycle Type Bit Definitions...........................................................................5-21
Transfer Size Bit Definition .........................................................................5-21
SYNC Bit Definition.....................................................................................5-21
ICH2 Response to Sync Failures................................................................5-22
DMA Transfer Size .....................................................................................5-27
Address Shifting in 16-bit I/O DMA Transfers.............................................5-27
DMA Cycle vs. I/O Address........................................................................5-31
PCI Data Bus vs. DMA I/O Port Size..........................................................5-31
DMA I/O Cycle Width vs. BE[3:0]# .............................................................5-32
Counter Operating Modes ..........................................................................5-38
Interrupt Controller Core Connections........................................................5-40
Interrupt Status Registers...........................................................................5-41
Content of Interrupt Vector Byte .................................................................5-41
APIC Interrupt Mapping ..............................................................................5-48
Arbitration Cycles........................................................................................5-49
APIC Message Formats..............................................................................5-50
Powered by ICminer.com Electronic-Library Service CopyRight 2003