Functional Description
5-50
Intel
82801BA ICH2 Datasheet
5.8.3.3
Bus Message Formats
After bus arbitration, the winner is granted exclusive use of the bus and will drive its message.
APIC messages come in four formats determined by the delivery mode bits. These four messages
are of different length and are known by all APICs on the bus through the transmission of the
Delivery Mode bits.
EOI Message For Level-Triggered Interrupts
EOI messages are used by local APICs to send an EOI cycle occurring for a level-triggered
interrupt to an I/O APIC. This message is needed so that the I/O APIC can differentiate between a
new interrupt on the interrupt line versus the same interrupt on the interrupt line. The target of the
EOI is given by the local APIC through the transmission of the priority vector (V7 through V0) of
the interrupt. Upon receiving this message, the I/O APIC resets the Remote IRR bit for that
interrupt. If the interrupt signal is still active after the IRR bit is reset, the I/O APIC will treat it as a
new interrupt.
Table 5-21. APIC Message Formats
Message
# of
Cycles
Delivery Mode
Bits
Comments
EOI
14
xxx
End of Interrupt transmission from Local APIC to I/O APIC
on Level interrupts. EOI is known by the EOI bit at the start
of arbitration.
Short
21
001, 010, 100,
101, 111
I/O APIC delivery on Fixed, NMI, SMI, Reset, ExtINT, and
Lowest Priority with focus processor messages.
Lowest Priority
33
001
Transmission of Lowest Priority interrupts when the status
field indicates that the processor does not have focus.
Remote Read
39
011
Message from one Local APIC to another to read registers.
Table 5-22. EOI Message
Cycle
Bit 1
Bit 0
Comments
1
0
0
EOI message
2–5
ARBID
1
Arbitration ID
6
NOT(V7)
NOT(V6)
Interrupt vector bits V7 - V0 from redirection table
register
7
NOT(V5)
NOT(V4)
8
NOT(V3)
NOT(V2)
9
NOT(V1)
NOT(V0)
10
NOT(C1)
NOT(C0)
Check Sum from Cycles 6 - 9
11
1
1
Postamble
12
NOT(A)
NOT(A)
Status Cycle 0
13
NOT(A1)
NOT(A1)
Status Cycle 1
14
1
1
Idle
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