參數(shù)資料
型號： 82845MZ
廠商： INTEL CORP
元件分類： 外設(shè)及接口
英文描述： Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)
中文描述： MULTIFUNCTION PERIPHERAL, PBGA593
封裝： 37.50 X 37.50 MM, FCBGA-593
文件頁數(shù)： 102/157頁
文件大?。?/td> 1407K
代理商： 82845MZ
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
102
Datasheet
250687-002
R
3.8.23.
DWTMC – DRAM Write Thermal Management Control
Offset:
Default:
Access:
Size:
50h-57h
0000_0000_0000_0000h
Read/Write/Lock
64 bits
Bit
Description
63:52
Reserved
51:50
TM Lock:
These bits secure the DRAM Thermal Management control registers. The bits default to
‘0’. Once a ‘1’ is written to either bit, the configuration register bits specified in DWTMC and DRTMC
registers become read-only:
00
Not locked
: All bits in DWTMC or DRTMC are writeable.
01
Start Mode bits are not locked:
All bits in DWTMC and DRTMC except for SWMT and
SRMT are locked and become Read Only.
10
All bits locked:
All of the bits in the DWTMC or DRTMC are locked and become Read
Only.
11
Reserved
Reserved
49
48:41
Global DRAM Write Sampling Window (GDWSW):
This eight bit value is multiplied by 4*10
5
to
define the length of time in host clocks over which the number of hexwords(32-Byte chunk) written is
counted. If the number of hexwords written during this window exceeds the Global Write Hexword
Threshold (GWHT) defined below, then the thermal management mechanism will be invoked.
40:28
Global Write Hexword Threshold (GWHT):
The thirteen-bit value held in this field is multiplied by
2
to arrive at the number of hexwords that must be written within the Global DRAM Write Sampling
Window(GDWSW) in order to cause the thermal management mechanism to be invoked.
27:22
Write Thermal Management Time (WTMT):
This value provides a multiplier between 0 and 63,
which specifies how long thermal management remains in effect as a number of Global DRAM Write
Sampling Windows*. For example, if GDWSW is programmed to
1000_0000b and WTT is set to 01_0000b, then thermal management will be performed for 8192*10
5
host clocks (at 100 MHz) seconds once invoked (128 * 4*10
host clocks * 16).
21:15
Write Thermal Management Monitoring Window (WTMMW):
The value in this register is padded
with 4 0’s to specify a window of 0-2047 host clocks with 16 clock granularity. While the thermal
management mechanism is invoked, DRAM writes are monitored during this window. If the number of
hexwords written during the window reaches the Write Thermal Management Hexword Maximum,
then write requests are blocked for the remainder of the window.
14:3
Write Thermal Management Hexword Maximum (WTMHM):
The Write Thermal Management
Hexword Maximum defines the maximum number of hexwords between 0-4095, which are permitted
to be written to DRAM within one Write Thermal Management Monitoring Window.
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