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Intel
82865G/82865GV GMCH Datasheet
13
Intel
82865G GMCH Features
I
Host Interface Support
— Intel
Pentium
4 processors with 512-KB L2 cache on 0.13
micron process / Pentium 4 processor on 90 nm process
— VTT 1.1 V – 1.55 V ranges
— 64-bit FSB frequencies of 400 MHz (100 MHz bus clock),
533 MHz (133 MHz bus clock), and 800 MHz (200 MHz bus
clock). Maximum theoretical BW of 6.4 GB/s.
— FSB Dynamic Bus Inversion on the data bus
— 32-bit addressing for access to 4 GB of memory space
— 12-deep In Order Queue
— AGTL+ On-die Termination (ODT)
— Hyper-Threading Technology
I
System Memory Controller Support
— Dual-channel (128 bits wide) DDR memory interface
— Single-channel (64 bits wide) DDR operation supported
— Symmetric and asymmetric memory dual-channel upgrade
supported
— 128-Mb, 256-Mb, 512-Mb technologies implemented as x8,
x16 devices
— Four bank devices
— Non-ECC, un-buffered DIMMS only
— Maximum of two DIMMs per channel, with each DIMM having
one or two rows
— Up to 4 GB system memory
— Supports up to 16 simultaneously-open pages (four per row) in
dual-channel mode and up to 32 open pages in single-channel
mode
— 4-KB to 64-KB page sizes (4 KB to 32 KB in single-channel,
8 KB to 64 KB in dual-channel)
— Supports opportunistic refresh
— Suspend-to-RAM support using CKE
— SPD (Serial Presence Detect) Scheme for DIMM Detection
supported
— Supports selective Command-Per-Clock (selective CPC)
Accesses
— DDR (Double Data Rate type 1) Support
- Supports maximum of two DDR DIMMs per channel,
single-sided and/or double-sided
- Supports DDR266, DDR333, DDR400 DIMM modules
- Supports DDR channel operation at 266 MHz, 333 MHz and
400 MHz with a Peak BW of 2.1 GB/s, 2.7 GB/s, and 3.2GB/s
respectively per channel
- Burst length of 4 and 8 for single-channel (32 or 64 bytes per
access, respectively); for dual-channel a burst of 4
(64 bytes per access)
- Supports SSTL_2 signaling
I
Communication Streaming Architecture (CSA) Interface
— Gigabit Ethernet (GbE) communication devices supported on
the CSA interface (e.g., Intel
82547EI GbE controller)
— Supports 8-bit Hub Interface 1.5 electrical/transfer protocol
— 266 MB/s point-to-point connection
— 1.5 V operation
I
Hub Interface (HI)
— Supports Hub Interface 1.5 electrical/transfer protocol
— 266 MB/s point-to-point connection to the ICH5
— 66 MHz base clock
— 1.5 V operation
I
AGP Interface Support
— A single AGP device
— AGP 3.0 with 4X / 8X AGP data transfers and 4X / 8X fast
writes, respectively
— 32-bit 4X/8X data transfers and 4X/8X fast writes
— Peak BW of 2 GB/s.
— 0.8 V and 1.5 V AGP signalling levels; no 3.3 V support
— AGP 2.0 1X/4X AGP data transfers and 4X fast writes
— 32-deep AGP request queue
I
Integrated Graphics
— Core Frequency of 266 MHz
— VGA/UMA Support
— High Performance 3D Setup and Render Engine
— High-Quality/Performance Texture Engine
— 3D Graphics Rendering Enhancements
— 2D Graphics
— Video DVD/PC-VCR
— Video Overlay
— Video Mixer Render Supported (VMR)
— Bi-Cubic Filter Support
I
Display Interfaces
— AGP signals multiplexed with two DVO ports (ADD card
supported)
— Multiplexed Digital Display Channels (Supported with ADD
Card)
I
Analog Display Support
— 350 MHz Integrated 24-bit RAMDAC
— Up to 2048x1536 @ 75 Hz refresh
— Hardware Color Cursor
— DDC2B Compliant Interface
— Simultaneous Display options with digital display
I
Digital Display Channels
— Two channels multiplexed with AGP
— 165 MHz dot clock on each 12-bit interface
— Can combine two, 12-bit channels to form one, 24-bit interface
Supports flat panels up to 2048x1536 @ 60 Hz or digital
CRT/HDTV at 1920x1080 @ 85 Hz
— Supports Hot Plug and Display
— Supports LVDS, TMDS transmitters or TV-out encoders
— ADD card utilizes AGP connector
— Supports one additional flat panel (dCRT) and/or one TV
(only when using internal GFX)
— Three Display Control interfaces (I
2
C/DDC) multiplexed on
AGP
I
GMCH Package
— 37.5 mm x 37.5 mm Flip Chip Ball Grid Array (FC-BGA)
package
— 932 solder balls with variable ball pitch