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180
Intel
82865G/82865GV GMCH Datasheet
Functional Description
5.5.2.1.7
Intel
DVO Modes
In single-channel mode, the order of pixel transmission (high-low vs. low-high) can be adjusted via
the data ordering bit of that DVO’s control register. As mentioned above, when in dual-channel
mode, the GMCH can transmit data in a high-low or odd-even format. In high-low mode, software
can choose which half goes to which port. A 0 = DVOB Lo/DVOC Hi, and a 1 = DVOB
Hi/ DVOC Lo. In odd/even mode, the odd pixels will always go out to DVOC and even pixels will
always go out to DVOB. Which DVO port is even and which is odd
cannot
be switched, but the
data order bit can be used to change the active data order within the even and odd pixels. The
GMCH considers the first pixel to be pixel zero and will send it out to DVOB.
5.5.3
Synchronous Display
Microsoft Windows* Me, Windows* 2000, and Windows* XP operating systems have enabled
support for multi-monitor display. Synchronous mode displays the same information on multiple
displays.
Since the GMCH has several display ports available for its single pipe, it can support a
synchronous display on 2 or 3 displays, unless one of the displays is a TV. No synchronous display
is available when a TV is in use. The GMCH cannot drive multiple displays concurrently (different
data or timings). In addition, the GMCH cannot operate in parallel with an external AGP device.
The GMCH can, however, work in conjunction with a PCI graphics adapter.
5.6
Power Management
The GMCH power management support includes:
ACPI supported
System States: S0, S1 (desktop), S3, S4, S5, C0, C1, C2 (desktop)
Graphics States: D0, D3
Monitor States: D0, D1, D2, D3
5.6.1
Supported ACPI States
GMCH supports the following ACPI States:
Graphics
— D0
Full on, display active.
— D3 Hot
GMCH power on. Display off. Configuration registers, state, and main
memory contents retained.
— D3 Cold
Processor
Power off.
— C0
Full On.
— C1
Auto Halt.
— C2-Desktop
Stop Grant. Clk to processor still running. Clock stopped to processor core.