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Intel
82865G/82865GV GMCH Datasheet
7
4.4
Functional Description
...................................................................................147
5.1
Processor Front Side Bus (FSB)..................................................................147
5.1.1
FSB Dynamic Bus Inversion ...........................................................147
5.1.2
FSB Interrupt Overview...................................................................148
5.1.2.1
Upstream Interrupt Messages.........................................148
5.2
System Memory Controller ..........................................................................149
5.2.1
DRAM Technologies and Organization...........................................150
5.2.2
Memory Operating Modes ..............................................................150
5.2.2.1
Dynamic Addressing Mode..............................................151
5.2.3
Single-Channel (SC) Mode.............................................................151
5.2.3.1
Linear Mode.....................................................................151
5.2.3.2
Tiled Mode.......................................................................151
5.2.4
Memory Address Translation and Decoding...................................151
5.2.5
Memory Organization and Configuration ........................................156
5.2.6
Configuration Mechanism for DIMMS.............................................157
5.2.6.1
Memory Detection and Initialization.................................157
5.2.6.2
SMBus Configuration and Access of the Serial Presence
Detect Ports.....................................................................157
5.2.6.3
Memory Register Programming.......................................157
5.2.7
Memory Thermal Management.......................................................158
5.2.7.1
Determining When to Thermal Manage...........................158
5.3
Accelerated Graphics Port (AGP)................................................................158
5.3.1
GMCH AGP Support.......................................................................159
5.3.2
Selecting between AGP 3.0 and AGP 2.0 ......................................159
5.3.3
AGP 3.0 Downshift (4X Data Rate) Mode.......................................159
5.3.3.1
Mechanism for Detecting AGP 2.0, AGP 3.0, or
Intel
DVO.......................................................................160
5.3.4
AGP Target Operations ..................................................................162
5.3.5
AGP Transaction Ordering..............................................................162
5.3.6
Support for PCI-66 Devices ............................................................163
5.3.7
8X AGP Protocol.............................................................................163
5.3.7.1
Fast Writes ......................................................................163
5.3.7.2
PCI Semantic Transactions on AGP ...............................163
5.4
Integrated Graphics Controller.....................................................................164
5.4.1
3D Engine .......................................................................................165
5.4.1.1
Setup Engine...................................................................165
5.4.1.2
Scan Converter................................................................166
5.4.1.3
2D Functionality...............................................................166
5.4.1.4
Texture Engine................................................................166
5.4.1.5
Raster Engine..................................................................168
5.4.2
2D Engine .......................................................................................172
5.4.3
Video Engine...................................................................................173
5.4.4
Planes.............................................................................................173
5.4.4.1
Cursor Plane....................................................................173
5.4.4.2
Overlay Plane..................................................................174
5.4.5
Pipes...............................................................................................175
5.5
Display Interfaces ........................................................................................175
5.5.1
Analog Display Port Characteristics................................................176
5.5.2
Digital Display Interface ..................................................................177
5.5.2.1
Digital Display Channels – Intel
DVOB and Intel
DVOC ...
177
AGP Memory Address Ranges....................................................................146
5