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40
Intel
82865G/82865GV GMCH Datasheet
Signal Description
2.6
Analog Display Interface
Signal Name
Type
Description
HSYNC
O
3.3 V
GPIO
CRT Horizontal Synchronization:
This signal is used as the horizontal sync
(polarity is programmable) or “sync interval.” This signal may need to be level
shifted.
VSYNC
O
3.3 V
GPIO
CRT Vertical Synchronization:
This signal is used as the vertical sync
(polarity is programmable). This signal may need to be level shifted.
RED
O
Analog
RED Analog Video Output:
This signal is a CRT Analog video output from the
internal color palette DAC. The DAC is designed for a 37.5
equivalent load
on each signal (e.g., 75
resistor on the board, in parallel with a 75
CRT
load).
RED#
O
Analog
RED# Analog Output:
This signal is an analog video output from the internal
color palette DAC. It is connected to a 37.5
resistor to ground. This signal is
used to provide noise immunity.
GREEN
O
Analog
GREEN Analog Video Output:
This signal is a CRT Analog video output from
the internal color palette DAC. The DAC is designed for a 37.5
equivalent
load on each signal (e.g., 75
resistor on the board, in parallel with a 75
CRT load).
GREEN#
O
Analog
GREEN# Analog Output:
This signal is an analog video output from the
internal color palette DAC. It is connected to a 37.5
resistor to ground. This
signal is used to provide noise immunity.
BLUE
O
Analog
BLUE Analog Video Output:
This signal is a CRT Analog video output from
the internal color palette DAC. The DAC is designed for a 37.5
equivalent
load on each signal (e.g., 75
resistor on the board, in parallel with a 75
CRT load).
BLUE#
O
Analog
BLUE# Analog Output:
This signal is an analog video output from the internal
color palette DAC. It is connected to a 37.5
resistor to ground. This signal is
used to provide noise immunity.
REFSET
I
Analog
Resistor Set:
Set point resistor for the internal color palette DAC. A 169
, 1%
resistor is required between REFSET and motherboard ground.
DDCA_CLK
I/O
3.3 V
GPIO
Analog DDC Clock:
Clock signal for the
I
2
C style interface that connects to
Analog CRT Display.
NOTE:
This signal may need to be level shifted to 5 Volts.
DDCA_DATA
I/O
3.3 V
GPIO
Analog DDC Data:
Data signal for the
I
2
C style interface that connects to
Analog CRT Display.
NOTE:
This signal may need to be level shifted to 5 Volts.