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| 型號(hào)： | 935268625518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數(shù)： | 15/82頁 |
| 文件大小： | 1965K |
| 代理商： | 935268625518 |
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Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
22 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9.3.2
Control Function register (address: 28H)
The Control Function register is used to perform the buffer management on the
endpoints. It consists of 1 byte and the bit conguration is given in Table 17.The
register bits can stall, clear or validate any enabled data endpoint. Before accessing
this register, the Endpoint Index register must be written rst to specify the target
endpoint.
[1]
Only applicable for control IN/OUT.
Table 15:
Endpoint Index register: bit description
Bit
Symbol
Description
7 to 6
-
reserved
5
EP0SETUP
Selects the SETUP buffer for Endpoint 0:
0 — EP0 data buffer
1 — SETUP buffer.
Must be logic 0 for access to other endpoints than Endpoint 0.
4 to 1
ENDPIDX[3:0] Endpoint Index: Selects the target endpoint for register access
of Buffer Length, Control Function, Data Port, Endpoint Type,
MaxPacketSize and Short Packet.
0
DIR
Direction bit: Sets the target endpoint as IN or OUT endpoint:
0 — target endpoint refers to OUT (RX) FIFO
1 — target endpoint refers to IN (TX) FIFO.
Table 16:
Addressing of Endpoint 0 buffers
Buffer name
EP0SETUP
ENDPIDX
DIR
SETUP
1
00H
0
Data OUT
0
00H
0
Data IN
0
00H
1
Table 17:
Control Function register: bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
CLBUF
VENDP
reserved
STATUS[1]
STALL
Reset
---
0
-
0
Bus reset
---
0
-
0
Access
R/W
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