參數(shù)資料
型號(hào)： 935268625518
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù)： 9/82頁(yè)
文件大?。?/td> 1965K
代理商： 935268625518
Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
17 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9.1 Register access
Register access depends on the bus width used:
8-bit bus: multi-byte registers are accessed lower byte (LSByte) rst.
16-bit bus: for single-byte registers the upper byte (MSByte) must be ignored.
Endpoint specic registers are indexed via the Endpoint Index register. The target
endpoint must be selected rst, before accessing the following registers:
Buffer Length
Control Function
Data Port
Endpoint MaxPacketsize
Endpoint Type
Short Packet.
Remark: All reserved bits are not implemented. The bus and bus reset values are not
dened. Therefore, writing to these reserved bits will have no effect.
9.2 Initialization registers
9.2.1
Address register (address: 00H)
This register is used to set the USB assigned address and enable the USB device.
Table 5 shows the Address register bit allocation.
The DEVEN and DEVADDR bits will be cleared whenever a bus reset, a power-on
reset or a soft reset occurs.
In response to the standard USB request SET_ADDRESS, the rmware must write
the (enabled) device address to the Address register, followed by sending an empty
packet to the host. The new device address is activated when the host acknowledges
the empty packet.
Table 5:
Address register: bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
DEVEN
DEVADDR[6:0]
Reset
0
00H
Bus reset
0
00H
Access
R/W
Table 6:
Endpoint Conguration register: bit description
Bit
Symbol
Description
7
DEVEN
A logic 1 enables the device.
6 to 0
DEVADDR[6:0]
This eld species the USB device address.
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