參數(shù)資料
型號(hào): 935268625518
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù): 30/82頁(yè)
文件大?。?/td> 1965K
代理商: 935268625518
Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
36 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
The cycle duration indicates the internal clock cycle (33.3 ns/cycle).
9.4.6
Task File registers (addresses: 40H to 4FH)
These registers allow direct access to the internal registers of an ATAPI peripheral
using PIO mode. The supported Task File registers and their functions are shown in
Table 39. The correct peripheral register is automatically addressed via pins CS1,
CS0, DA2, DA1 and DA0 (see Table 40).
Table 37:
DMA Strobe Timing register: bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
DMA_STROBE_CNT[4:0]
Reset
---
1FH
Bus reset
---
1FH
Access
R/W
Table 38:
DMA Strobe Timing register: bit description
Bit
Symbol
Description
7 to 5
-
reserved.
4 to 0
DMA_
STROBE_
CNT[4:0]
These bits select the strobe duration for DMA_MODE = 03H
(see Table 33). The strobe duration is (N+1) cycles[1], with N
representing the value of DMA_STROBE_CNT (see Figure 3).
Fig 3.
Programmable strobe timing.
x
(N + 1) cycles
004aaa125
Table 39:
Task File register functions
Address (Hex)
ATA function
ATAPI function
1F0
data (16-bits)
1F1
error/feature
1F2
sector count
interrupt reason
1F3
sector number/LBA[7:0]
reserved
1F4
cylinder low/LBA[15:8]
cylinder low
1F5
cylinder high/LBA[23:16]
cylinder high
1F6
drive/head/LBA[27:24]
drive select
1F7
command
status/command
3F6
alternate status/command
3F7
drive address
reserved
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