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參數(shù)資料
| 型號(hào)： | 935268625518 |
| 廠(chǎng)商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 總線(xiàn)控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁(yè)數(shù)： | 23/82頁(yè) |
| 文件大?。?/td> | 1965K |
| 代理商： | 935268625518 |
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Philips
Semiconductor
s
ISP1581
Hi-Speed
USB
interface
de
vice
9397
750
10766
K
oninklijk
e
Philips
Electronics
N.V
.2003.
All
r
ights
reser
v
ed.
Pr
oduct
data
Re
v
.05
—
26
Februar
y
2003
3
of
78
5.
Bloc
k
dia
gram
The direction of pins DREQ, DACK, DIOR and DIOW is determined by bit MASTER (DMA Hardware register) and bit ATA_MODE (DMA Conguration register).
Fig 1.
Block diagram.
004aaa153
16
4
1.5
k
12.0 k
ISP1581
Hi-Speed USB
TRANSCEIVER
10
8
7
3.3 V
RESET
RREF
4
3
VOLTAGE
REGULATORS
POWER-ON
RESET
MEMORY
MANAGEMENT
UNIT
INTEGRATED
RAM
(8 KBYTE)
MICRO
CONTROLLER
INTERFACE
DMA
INTERFACE
MICRO-
CONTROLLER
HANDLER
DMA
HANDLER
DMA
REGISTERS
12 MHz
XTAL2
XTAL1
to/from USB
SYSTEM
CONTROLLER
PHILIPS
SIE/PIE
2
SoftConnect
18, 17,
19, 20, 21
12, 13,
14, 15
40, 41,
44 to 57
READY
*
28
INT
internal
reset
analog
supply
3.3 V
DATA0 to DATA15
MODE0
*, MODE1
22
19
22
20, 9
16
BUS_CONF
*
8
30 to 35, 38, 39
25, 29, 26, 27
AD0 to AD7
DREQ, DACK,
DIOR, DIOW
CS0, CS1,
DA0
*, DA1*, DA2
VCC(5.0)
digital
supply
3.3 V
5 V
60
59
INTRQ
IORDY
*
*Denotes shared pin usage
RPU
5
D
6
D
+
VCCA(3.3)
24, 37,
43, 58, 64
VCC(3.3)
63
TEST
62
WAKEUP
AGND
2
5
4
1
5
1, 23,
36, 42, 61
DGND
5
CS, ALE/A0, (R/W)/RD,
DS/WR
11
EOT
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