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參數(shù)資料
| 型號： | 935268625518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數(shù)： | 39/82頁 |
| 文件大小： | 1965K |
| 代理商： | 935268625518 |
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Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
44 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9.5.3
Frame Number register (address: 74H)
This read-only register contains the frame number of the last successfully received
Start Of Frame (SOF). The register contains 2 bytes and the bit allocation is given in
Table 61. In case of 8-bit access the register content is returned lower byte rst.
9.5.4
Scratch register (address: 78H)
This 16-bit register can be used by the rmware to save and restore information, e.g.
the device status before it enters the ‘suspend’ state. The content of this register will
not be altered by a bus reset. The bit allocation is given in Table 63.
Table 60:
Chip ID Register: bit description
Bit
Symbol
Description
23 to 16
CHIPID[23:16] Chip ID: lower byte (15H)
15 to 8
CHIPID[15:8]
Chip ID: upper byte (81H)
7 to 0
VERSION
Version number (51H): The version number will be upgraded as
and when there are new revisions with improved performance
and functionality.
Table 61:
Frame Number register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
reserved
MICROSOF[2:0]
SOFR[10:8]
Power Reset
-
00H
Bus Reset
-
00H
Access
RR
R
Bit
7
6
5
4
3
2
1
0
Symbol
SOFR[7:0]
Power Reset
00H
Bus Reset
00H
Access
R
Table 62:
Frame Number register: bit description
Bit
Symbol
Description
13 to 11
MICROSOF[2:0]
microframe number
10 to 0
SOFR[10:0]
frame number
Table 63:
Scratch Register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
SFIRH[7:0]
Reset
00H
Bus reset
unchanged
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
SFIRL[7:0]
Reset
00H
Bus reset
unchanged
Access
R/W
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