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參數(shù)資料
| 型號： | AM29LV2562MH120PII |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O⑩ Control |
| 中文描述： | 512兆位（16 M中的x 32-Bit/32 M中的x 16位），3.0伏的MirrorBit⑩只均勻部門閃存記憶體與VersatileI /輸出⑩控制 |
| 文件頁數(shù)： | 46/67頁 |
| 文件大?。?/td> | 473K |
| 代理商： | AM29LV2562MH120PII |
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44
Am29LV2562M
December 16, 2005
D A T A S H E E T
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin
which indicates whether an Embedded Algorithm is in
progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command
sequence. Since RY/BY# is an open-drain output, sev-
eral RY/BY# pins can be tied together in parallel with a
pull-up resistor to V
CC
.
If the output is low (Busy), the device is actively eras-
ing or programming. (This includes programming in
the Erase Suspend mode.) If the output is high
(Ready), the device is in the read mode, the standby
mode, or in the erase-suspend-read mode. Table 12
shows the outputs for RY/BY#.
DQ6 and DQ14: Toggle Bits I
Toggle Bit I on DQ6 and DQ14indicates whether an
Embedded Program or Erase algorithm is in progress
or complete, or whether the device has entered the
Erase Suspend mode. Toggle Bit I may be read at any
address, and is valid after the rising edge of the final
WE# pulse in the command sequence (prior to the
program or erase operation), and during the sector
erase time-out.
During an Embedded Program or Erase algorithm op-
eration, successive read cycles to any address cause
DQ6 and DQ14 to toggle. The system may use either
OE# or CE# to control the read cycles. When the oper-
ation is complete, DQ6 and DQ14 stops toggling.
After an erase command sequence is written, if all sectors
selected for erasing are protected, DQ6 and DQ14 toggles
for approximately 100 μs, then returns to reading array data.
If not all selected sectors are protected, the Embedded
Erase algorithm erases the unprotected sectors, and ig-
nores the selected sectors that are protected.
The system can use DQ6 and DQ14 and DQ2 and DQ10
together to determine whether a sector is actively erasing or
is erase-suspended. When the device is actively erasing
(that is, the Embedded Erase algorithm is in progress), DQ6
and DQ14 toggle. When the device enters the Erase Sus-
pend mode, DQ6 and DQ14 stop toggling. However, the
system must also use DQ2 and DQ10 to determine which
sectors are erasing or erase-suspended. Alternatively, the
system can use DQ7 and DQ15 (see the subsection on
DQ7 and DQ15: Data# Polling).
If a program address falls within a protected sector,
DQ6 and DQ14 toggle for approximately 1 μs after the
program command sequence is written, then returns
to reading array data.
DQ6 and DQ14 also toggle during the erase-sus-
pend-program mode, and stops toggling once the Em-
bedded Program algorithm is complete.
Table 12 shows the outputs for Toggle Bit I on DQ6
and DQ14. Figure 8 shows the toggle bit algorithm.
Figure 20 in the “AC Characteristics” section shows
the toggle bit timing diagrams. Figure 21 shows the dif-
ferences between DQ2 and DQ10 and DQ6 and DQ14
in graphical form. See also the subsection on
DQ2 and
DQ10: Toggle Bits II
.
Figure 8.
Toggle Bit Algorithm
START
No
Yes
Yes
DQ5 = 1
No
Yes
Toggle Bit
= Toggle
No
Program/Erase
Operation Not
Complete, Write
Reset Command
Program/Erase
Operation Complete
Read DQ7–DQ0
Toggle Bit
= Toggle
Read DQ7–DQ0
Twice
Read DQ7–DQ0
Note:
The system should recheck the toggle bit even if
DQ5 and DQ13= “1” because the toggle bit may stop
toggling as DQ5 and DQ13 changes to “1.” See the
subsections on DQ6 and DQ14 and DQ2 and DQ10 for
more information.
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