![](http://datasheet.mmic.net.cn/260000/AM79C975_datasheet_15869143/AM79C975_247.png)
Am79C973/Am79C975
247
P R E L I M I N A R Y
Figure 70. Standard Data Transfer on the Serial Management Interface
A data transfer that involves a change in the direction
data is transferred is a more complex operation. An ex-
ample is a data write transfer followed by a data read
transfer. After finishing the data write transfer, the mas-
ter must initiate the turn-around of the MDATA line by
asserting a repeated START condition followed by a re-
peated 7-bit slave address and the READ bit. The
Am79C975 controller will drive the MCLOCK line low in
order to insert wait states before it starts driving the
read data onto the MDATA pin., The master acts as the
receiver and must generate ACK. (See section
Byte
Read Command or Block Read Command
for more de-
tails).
Figure 71. Data Transfer with Change in Direction (with wait state)
Am79C975 Slave Address
The default value for the 7-bit slave address of the
Am79C975 SMIU is 5Bh. This is the address assigned
for a device from the class Networking Controller by
Phillips. The address value can be changed via the EE-
PROM. If bit 7 of EEPROM location 50h is set to 0, the
default slave address will be used. Otherwise, bits 6-0
of EEPROM location 50h define the slave address for
the SMIU. If a system uses multiple Am79C975 control-
lers, recommended values for the slave address of the
other devices are 58h, 59h and 5Ah.
Register Access
The I
2
C specification allows for an unlimited number of
bytes being transferred per data transfer. The SMB
specification defines a set of commands that structure
the data transfers and limit their length. The SMIU of
the Am79C975 controller follows the SMB specification
and implements a subset of the commands to allow ac-
cess to the SMIU registers and internal memories.
Write Byte Command
The Write Byte command is used to write 1 byte of data
to an SMIU register. The command starts with the
START condition (S). The next 7 bits are the slave ad-
dress of the Am79C975 controller, followed by a 0 bit to
indicate a write operation (W). The Am79C975 control-
ler will drive SDATA LOW for 1 bit time to acknowledge
the first byte (A). The next 8 bits specify the address of
the SMIU register (MReg) that is accessed, followed by
another ACK from the Am79C975 controller. The third
byte is the write data to the SMIU register, followed by
ACK. The master terminates the transfer with the as-
sertion of the STOP condition (P).
MDATA
MCLOCK
R/W
A
ACK
from the receiver
A/A
First Byte of Data
S
1
2
3
4
5
6
7
8
9
1
2
3 - 8
9
P
Star Condition
0=Write
1 = Read
Stop Condition
7-Bit Address
MSB
21510D-B74
MDATA
MCLOCK
A
Data
6
Repeated Start Condition
7
8
9
S
Wait State
1
2
Data
21510D-B75
7
6-0
D
Slave
Address
D=0: Default address will be used as
slave address
D=1: Bits 6-0 define the slave address