參數(shù)資料
型號: APMOTOR56F8000E
廠商: Freescale Semiconductor
文件頁數(shù): 65/124頁
文件大?。?/td> 0K
描述: KIT DEMO MOTOR CTRL SYSTEM
標(biāo)準(zhǔn)包裝: 1
附件類型: 電機(jī)控制器
適用于相關(guān)產(chǎn)品: DEMO56F8013,DEMO56F8013-E
相關(guān)產(chǎn)品: MC56F8006VWL-ND - DSC 16K FLASH 32MHZ 28-SOIC
MC56F8006VLF-ND - DSC 16K FLASH 32MHZ 48-LQFP
MC56F8006VLC-ND - DSC 16K FLASH 32MHZ 32-LQFP
MC56F8002VWL-ND - DSC 12K FLASH 32MHZ 28-SOIC
DEMO56F8014-E-ND - BOARD DEMO MC56F8014 W/UNIV PS
DEMO56F8014-ND - BOARD DEMO MC56F8014 W/US PS
DEMO56F8014-EE-ND - BOARD DEMO FOR 56F8014
DEMO56F8013-EE-ND - BOARD DEMO FOR 56F8013
MC56F8014VFAE-ND - IC DIGITAL SIGNAL CTRLR 32-LQFP
MC56F8013VFAE-ND - IC DIGITAL SIGNAL CTLR 32-LQFP
更多...
Block Diagram
56F8014 Technical Data, Rev. 11
Freescale Semiconductor
45
5.4 Block Diagram
Figure 5-1 Interrupt Controller Block Diagram
5.5 Register Descriptions
A register address is the sum of a base address and an address offset. The base address is defined at the
system level and the address offset is defined at the module level. The ITCN module has 16 registers.
Table 5-2 ITCN Register Summary
(ITCN_BASE = $00 F060)
Register
Acronym
Base Address +
Register Name
Section Location
IPR0
$0
Interrupt Priority Register 0
IPR1
$1
Interrupt Priority Register 1
IPR2
$2
Interrupt Priority Register 2
Priority
Level
2 -> 4
Decode
INT0
Priority
Level
2 -> 4
Decode
INT45
Level 0
46 -> 6
Priority
Encoder
any0
Level 3
46 -> 6
Priority
Encoder
any3
INT
VAB
IPIC
CONTROL
6
PIC_EN
IACK
SR[9:8]
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