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| 型號(hào)： | APMOTOR56F8000E |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 77/124頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEMO MOTOR CTRL SYSTEM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 附件類型： | 電機(jī)控制器 |
| 適用于相關(guān)產(chǎn)品： | DEMO56F8013，DEMO56F8013-E |
| 相關(guān)產(chǎn)品： | MC56F8006VWL-ND - DSC 16K FLASH 32MHZ 28-SOIC MC56F8006VLF-ND - DSC 16K FLASH 32MHZ 48-LQFP MC56F8006VLC-ND - DSC 16K FLASH 32MHZ 32-LQFP MC56F8002VWL-ND - DSC 12K FLASH 32MHZ 28-SOIC DEMO56F8014-E-ND - BOARD DEMO MC56F8014 W/UNIV PS DEMO56F8014-ND - BOARD DEMO MC56F8014 W/US PS DEMO56F8014-EE-ND - BOARD DEMO FOR 56F8014 DEMO56F8013-EE-ND - BOARD DEMO FOR 56F8013 MC56F8014VFAE-ND - IC DIGITAL SIGNAL CTRLR 32-LQFP MC56F8013VFAE-ND - IC DIGITAL SIGNAL CTLR 32-LQFP 更多... |
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56F8014 Technical Data, Rev. 11
56
Freescale Semiconductor
5.5.6
Vector Base Address Register (VBA)
Figure 5-8 Vector Base Address Register (VBA)
5.5.6.1
Reserved—Bits15—14
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.5.6.2
Vector Address Bus (VAB)—Bits 13—0
The value in this register is used as the upper 14 bits of the interrupt vector VAB[20:0]. The lower 7 bits
are determined based on the highest priority interrupt and are then appended onto VBA before presenting
the full VAB to the Core.
5.5.7
Fast Interrupt Match 0 Register (FIM0)
Figure 5-9 Fast Interrupt Match 0 Register (FIM0)
5.5.7.1
Reserved—Bits 15–6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.5.7.2
Fast Interrupt 0 Vector Number (FAST INTERRUPT 0)—Bits 5–0
These values determine which IRQ will be Fast Interrupt 0. Fast Interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first. IRQs used as Fast Interrupts must be set to priority level 2. Unexpected results will occur if a Fast
Interrupt vector is set to any other priority. A Fast Interrupt automatically becomes the highest-priority
level 2 interrupt regardless of its location in the interrupt table prior to being declared as Fast Interrupt.
Fast Interrupt 0 has priority over fast Interrupt 1. To determine the vector number of each IRQ, refer to the
vector table.
Base + $5
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
VECTOR_BASE_ADDRESS
Write
RESET1
1. The 56F8014 resets to a value of 0x0000. This corresponds to reset addresses of 0x00 0000.
0
000
0
0000000
0
Base + $6
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
FAST INTERRUPT 0
Write
RESET
00000
0000000
0000
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