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參數(shù)資料
| 型號： | CY7C1512JV18-267BZXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 4M X 18 QDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165 |
| 文件頁數(shù)： | 19/26頁 |
| 文件大?。?/td> | 648K |
| 代理商： | CY7C1512JV18-267BZXC |
Document #: 001-14435 Rev. *F
Revised July 31, 2009
Page 26 of 26
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, IDT, NEC, Renesas, and Samsung. All product and company names mentioned in this document
are the trademarks of their respective holders.
CY7C1510JV18, CY7C1525JV18
CY7C1512JV18, CY7C1514JV18
Cypress Semiconductor Corporation, 2007-2009. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used
for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support
systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at cypress.com/sales.
Products
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Document History Page
Document Title: CY7C1510JV18/CY7C1525JV18/CY7C1512JV18/CY7C1514JV18, 72-Mbit QDR-II SRAM 2-Word
Burst Architecture
Document Number: 001-14435
Rev.
ECN No.
Orig. Of
Change
Submission
Date
Description Of Change
**
1060980
VKN
See ECN
New Data Sheet
*A
1397384
VKN
See ECN
Added 267MHz speed bin
*B
1462588
VKN/AESA
See ECN
Converted from preliminary to final
Removed 200MHz speed bin
Updated IDD/ISB specs
Changed DLL minimum operating frequency from 80MHz to 120MHz
Changed tCYC max spec to 8.4ns for all speed bins
*C
2189567
VKN/AESA
See ECN
Minor Change-Moved to the external web
*D
2561954
VKN/PYRS
09/04/08
Changed Ambient Temperature with Power Applied from “–10°C to +85°C” to
“–55°C to +125°C” in the “Maximum Ratings“ on page 20,
Updated Power-up sequence waveform and it’s description,
Added footnote #19 related to IDD,
Changed
Θ
JA spec from 16.2 to 16.3, Changed ΘJC spec from 2.3 to 2.1,
Changed JTAG ID [31:29] from 001 to 000.
*E
2612311
VKN/PYRS
11/25/08
Corrected logic block diagram of CY7C1525JV18
*F
2746930
NJY
07/31/09
Post to external web
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相關代理商/技術參數(shù) |
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| CY7C1512KV18-200BZXC | 功能描述:靜態(tài)隨機存取存儲器 4Mb x 18 200 MHz RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1512KV18-200BZXI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C1512KV18-250BZC | 功能描述:靜態(tài)隨機存取存儲器 72MB (4Mx18) 1.8v 250MHz QDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1512KV18-250BZCT | 功能描述:靜態(tài)隨機存取存儲器 4Mx18 72MB 2.9V RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1512KV18-250BZI | 功能描述:靜態(tài)隨機存取存儲器 72MB (4Mx18) 1.8v 250MHz QDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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