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參數(shù)資料
| 型號： | CY7C1512JV18-267BZXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 4M X 18 QDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165 |
| 文件頁數(shù)： | 24/26頁 |
| 文件大?。?/td> | 648K |
| 代理商： | CY7C1512JV18-267BZXC |
CY7C1510JV18, CY7C1525JV18
CY7C1512JV18, CY7C1514JV18
Document #: 001-14435 Rev. *F
Page 7 of 26
CQ
Echo Clock
CQ is Referenced with Respect to C. This is a free running clock and is synchronized to the input clock
for output data (C) of the QDR-II. In single clock mode, CQ is generated with respect to K. The timing for
the echo clocks is shown in Switching Characteristics on page 22.
CQ
Echo Clock
CQ is Referenced with Respect to C. This is a free running clock and is synchronized to the input clock
for output data (C) of the QDR-II. In single clock mode, CQ is generated with respect to K. The timing for
the echo clocks is shown in the Switching Characteristics on page 22.
ZQ
Input
Output Impedance Matching Input. This input is used to tune the device outputs to the system data bus
impedance. CQ, CQ, and Q[x:0] output impedance are set to 0.2 x RQ, where RQ is a resistor connected
between ZQ and ground. Alternatively, connect this pin directly to VDDQ, which enables the minimum
impedance mode. This pin cannot be connected directly to GND or left unconnected.
DOFF
Input
DLL Turn Off
Active LOW. Connecting this pin to ground turns off the DLL inside the device. The timing
in the operation with the DLL turned off differs from those listed in this data sheet. For normal operation,
connect this pin to a pull up through a 10 K
Ω or less pull up resistor. The device behaves in QDR-I mode
when the DLL is turned off. In this mode, the device is operated at a frequency of up to 167 MHz with
QDR-I timing.
TDO
Output
TDO for JTAG.
TCK
Input
TCK Pin for JTAG.
TDI
Input
TDI Pin for JTAG.
TMS
Input
TMS Pin for JTAG.
NC
N/A
Not Connected to the Die. Can be tied to any voltage level.
VSS/144M
Input
Not Connected to the Die. Can be tied to any voltage level.
VSS/288M
Input
Not Connected to the Die. Can be tied to any voltage level.
VREF
Input-
Reference
Reference Voltage Input. Static input used to set the reference level for HSTL inputs, outputs, and AC
measurement points.
VDD
Power Supply Power Supply Inputs to the Core of the Device.
VSS
Ground
Ground for the Device.
VDDQ
Power Supply Power Supply Inputs for the Outputs of the Device.
Pin Definitions (continued)
Pin Name
I/O
Pin Description
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相關(guān)代理商/技術(shù)參數(shù) |
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| CY7C1512KV18-200BZXC | 功能描述:靜態(tài)隨機存取存儲器 4Mb x 18 200 MHz RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1512KV18-200BZXI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C1512KV18-250BZC | 功能描述:靜態(tài)隨機存取存儲器 72MB (4Mx18) 1.8v 250MHz QDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1512KV18-250BZCT | 功能描述:靜態(tài)隨機存取存儲器 4Mx18 72MB 2.9V RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1512KV18-250BZI | 功能描述:靜態(tài)隨機存取存儲器 72MB (4Mx18) 1.8v 250MHz QDR II 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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