參數(shù)資料
型號: CY7C1524KV18-333BZI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 2M X 36 DDR SRAM, 0.45 ns, PBGA165
封裝: 15 X 13 MM, 1.40 MM HEIGHT, MO-216, FBGA-165
文件頁數(shù): 10/32頁
文件大小: 883K
代理商: CY7C1524KV18-333BZI
CY7C1522KV18, CY7C1529KV18
CY7C1523KV18, CY7C1524KV18
Document Number: 001-00438 Rev. *F
Page 18 of 32
Identification Register Definitions
Instruction Field
Value
Description
CY7C1522KV18
CY7C1529KV18
CY7C1523KV18
CY7C1524KV18
Revision Number
(31:29)
000
Version number.
Cypress Device ID
(28:12)
11010100010000100 11010100010001100 11010100010010100 11010100010100100 Defines the type of
SRAM.
Cypress JEDEC ID
(11:1)
00000110100
Allows unique
identification of
SRAM vendor.
ID Register
Presence (0)
1111
Indicates the
presence of an ID
register.
Scan Register Sizes
Register Name
Bit Size
Instruction
3
Bypass
1
ID
32
Boundary Scan
109
Instruction Codes
Instruction
Code
Description
EXTEST
000
Captures the input and output ring contents.
IDCODE
001
Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operation.
SAMPLE Z
010
Captures the input and output contents. Places the boundary scan register between TDI and
TDO. Forces all SRAM output drivers to a High-Z state.
RESERVED
011
Do Not Use: This instruction is reserved for future use.
SAMPLE/PRELOAD
100
Captures the input and output ring contents. Places the boundary scan register between TDI
and TDO. Does not affect the SRAM operation.
RESERVED
101
Do Not Use: This instruction is reserved for future use.
RESERVED
110
Do Not Use: This instruction is reserved for future use.
BYPASS
111
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operation.
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