- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376602 > DDP3310B (MICRONAS SEMICONDUCTOR HOLDING AG) Display and Deflection Processor PDF資料下載
參數(shù)資料
| 型號(hào)： | DDP3310B |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Display and Deflection Processor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 22/60頁 |
| 文件大?。?/td> | 1540K |
| 代理商： | DDP3310B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
DDP 3310B
ADVANCE INFORMATION
22
Micronas
3.3. XDFP Control and Status Registers
The second class are
“
XDFP-REGISTERS
”
, which are
used by the XDFP on-chip controller. Access to these
registers is achieved by subaddressing.
–
Writing to these registers is done by sending the
device write address first, followed by the XDFP-
write subaddress, two address bits for the desired
XDFP-register, and the two data bytes.
–
For reading, the XDFP-register address has to be
transmitted first by sending the device write
address, followed by the XDFP-read subaddress
and the two XDFP-register address bytes. Without
sending a stop condition, reading of the addressed
data is done by sending the device read address
and reading two bytes of data.
Fig. 3
–
3 shows I
2
C protocol for read and write opera-
tions. Table 3
–
3 gives definitions of the XDFP control
and status registers. If these registers are smaller than
16 bit, the remaining bits should be 0 on write and read
operations. Due to the internal architecture, the IC can-
not react immediately to an I
2
C request, which inter-
acts with the on-chip controller. The maximum
response timing is approximately 20 ms. If the
addressed controller is not ready for further transmis-
sions on the I
2
C-bus, the clock line SCL is pulled low.
This puts the current transmission into a wait state.
After a certain period of time, the clock line will be
released and the interrupted transmission is carried
on.
A hardware reset initializes all control registers to 0.
The automatic chip initialization loads a selected set of
registers with the default values given in Table 3
–
3.
The register modes are
8/16- bit width
r
read only register
w
write only register
r/w
write/read data register
Note:
set unused bits to
‘
0
‘
!
The mnemonics used in the DDP 3310B demo soft-
ware are given in the last column.
Fig. 3
–
3:
XDFP protocol
Table 3
–
1:
XDFP read/write address
XDFP Read address
h
’
13
XDFP Write address
h
’
12
Ack
Nak
Ack
Ack
Ack
Start Condition
Stop Condition
W
R
Ack
Nak
S
P
=
=
1 (Read Bit)
0 (Write Bit)
=
=
=
=
0 (Acknowledge Bit from DDP 3310B=gray
or Controller = hatched)
1 (Not Acknowledge Bit from Controller=hatched or
indicating an error state from DDP 3310B=gray)
Write to XDFP Control Register:
Read from XDFP Control Register:
S 1000101 W
XDFP Read Addr.
Ack
P
S 1000101
R
High-Byte Addr.
Low-Byte Addr.
Low-Byte Data
Ack
High-Byte Data
Ack
Ack
Ack
Ack
Ack
S 1000101 W
XDFP Write Addr.
Ack
P
High-Byte Addr.
Low-Byte Addr.
Low-Byte Data
High-Byte data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DDR-TJS-T2 | LED AlInGaP |
| DD0-SJS-S1 | LED AlInGaP |
| DD0-SJS-S2 | LED AlInGaP |
| DD0-SJS-T1 | LED AlInGaP |
| DD0-SJS-T2 | LED AlInGaP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DDP-37CT | 制造商:Pan Pacific 功能描述: |
| DDP400-P1 | 制造商:CCM Assembly & Manufacturing 功能描述:AC Input Cable for ROAL DDP400 series, Bulk |
| DDP400-P4 | 制造商:CCM Assembly & Manufacturing 功能描述:DC Output Cable for ROAL DDP400 series, Bulk |
| DDP400-P6 | 制造商:CCM Assembly & Manufacturing 功能描述:Signal Cable for ROAL DDP400 series, Bulk |
| DDP400-US12-FF | 制造商:ROAL Electronics 功能描述:AC/DC 400W 12V Single Output Enclosed Front Fan, Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。