參數資料
型號: DDP3310B
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: 消費家電
英文描述: Display and Deflection Processor
中文描述: SPECIALTY CONSUMER CIRCUIT, PQCC68
封裝: PLASTIC, LCC-68
文件頁數: 25/60頁
文件大小: 1540K
代理商: DDP3310B
ADVANCE INFORMATION
DDP 3310B
Micronas
25
CHROMA CHANNEL
h
1AF
16-r/w
luma/chroma matching delay
bit [2:0]
2...2
bit [3]
bit [4]
0/1
bit [5]
variable chroma delay
not used, set to
0
C
B
(U) sample first / C
R
(V) sample first
not used, set to
0
0
0
0
CRCTRL
CDEL
ENVU
h
1AB
16-r/w
digital transient improvement
bit [3:0]
0..15
bit [7:4]
0..15
bit [8]
0/1
coring value
DTI gain
narrow/wide bandwidth mode
1
5
1
DTICTRL
DTICO
DTIGA
DTIMO
LUMA CHANNEL
h
1B1
16-r/w
bit [14:9]
0..63
picture contrast in steps of 1/32
32
CTM
h
19A
16-r/w
bit [8:0]
256..255
luma DC-offset
0
BRM
h
1AA
16-r/w
luma peaking filter, the gain at high frequencies and small
signal amplitudes is: 1 + (k1+k2)/8
bit [3:0]
0..15
k1: peaking level undershoot
bit [7:4]
0..15
k2: peaking level overshoot
bit [8]
0/1
peaking value normal/inverted
(peaking/softening)
4
4
0
PK1
PKUN
PKOV
PKINV
h
1AE
16-r/w
luma peaking filter, coring
bit [4:0]
0..31
bit [7:5]
000
001
01x
100
101
11x
bit [8]
0/1
coring level
peaking reduction
100 %
80 %
60 %
50 %
40 %
30 %
peaking filter center frequency High/Low
3
0
0
PK2
COR
PKRD
PFS
h
18A
16-r/w
luma soft limiter, slope A and B
bit [3:0]
bit [7:4]
slope segment A
slope segment B
0
0
LSLS
LSLSA
LSLSB
h
18E
16-r/w
luma soft limiter, limit A
bit [7:0]
bit [8]
luma soft limiter absolute limit (unsigned)
modulation off/on
(resolution enhancement)
0/1
255
0
LSLA
LSLAL
LSLM
h
192
16-r/w
luma soft limiter, limit B
bit [8:0]
luma soft limiter segment B tilt point
(unsigned)
300
LSLTB
h
196
16-r/w
bit [8:0]
luma soft limiter segment A tilt point
(unsigned)
250
LSLTA
Table 3
3:
Control Registers of the XDFP, continued
XDFP Control and Status Registers
Subaddr.
Mode
Function
Default
Name
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