參數(shù)資料
型號: DDP3310B
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: 消費(fèi)家電
英文描述: Display and Deflection Processor
中文描述: SPECIALTY CONSUMER CIRCUIT, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 48/60頁
文件大小: 1540K
代理商: DDP3310B
DDP 3310B
ADVANCE INFORMATION
48
Micronas
4.6.4.6. I
2
C-Bus Interface
Fig. 4
22:
I
2
C bus timing
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
V
IL
Input Low Voltage
SDA
SCL
1.5
V
V
IH
Input High Voltage
3.0
V
V
OL
Output Low Voltage
0.6
V
I
OL
= 6 mA
I
OL
Output Low Current
10
mA
C
IN
Input Capacitance
5
pF
t
F
Signal Fall Time
300
ns
C
L
= 400 pF
t
R
Signal Rise Time
300
ns
C
L
= 400 pF
f
SCL
Clock Frequency
SCL
0
400
kHz
t
LOW
Low Period of SCL
1.3
μ
s
t
HIGH
High Period of SCL
0.6
μ
s
t
IS
Input Data Set Up Time
to SCL high
SDA
55
ns
t
IH
Input Data Hold Time
to SCL Low
55
ns
t
OS
Output Data Set Up Time
to SCL High
100
ns
t
OH
Output Data Hold Time
to SCL Low
15
900
ns
SDA as
input
SCL
V
IH
V
IL
t
LOW
t
HIGH
t
R
t
F
1/f
SCL
V
IH
V
IL
V
IH
V
IL
SDA as
output
t
IS
t
OS
t
OH
t
IS
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