參數(shù)資料
型號： DTMFDECODER-RD
廠商： Silicon Laboratories Inc
文件頁數(shù)： 178/178頁
文件大小： 0K
描述： KIT REF DESIGN DTMF DECODER
應用說明： DTMF Decoder Ref Design AppNote
標準包裝： 1
主要目的： 電信，DTMF 解碼器
嵌入式： 否
已用 IC / 零件： C8051F300
主要屬性： 8kHz 采樣速率模數(shù)轉(zhuǎn)換器
次要屬性： 16 個 Goertzel 濾波器
已供物品： 板，軟件
產(chǎn)品目錄頁面： 627 (CN2011-ZH PDF)
相關產(chǎn)品： 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名稱： 336-1283
Table 11.1. Internal Oscillator Electrical Characteristics
–40 to +85 °C unless otherwise specified
Calibrated Internal Oscillator
Frequency
C8051F300/1 devices
–40 to +85 °C
24
24.5
25
MHz
C8051F300/1 devices
0 to +70 °C
24.3
24.7
25
MHz
Uncalibrated Internal Oscillator
Frequency
C8051F302/3/4/5 devices
16
20
24
MHz
Internal Oscillator Supply Current
(from VDD)
OSCICN.2 = 1
450
A
11.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crys-
tal/resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 11.1. A
10 M
resistor also must be wired across the XTAL2 and XTAL1 pins for the crystal/resonator configura-
tion. In RC, capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 pin as
shown in Option 2, 3, or 4 of Figure 11.1. The type of external oscillator must be selected in the OSCXCN
register, and the frequency control bits (XFCN) must be selected appropriately (see SFR Definition 11.3).
Important Note on External Oscillator Usage: Port pins must be configured when using the external
oscillator circuit. When the external oscillator drive circuit is enabled in crystal/resonator mode, Port pins
P0.2 and P0.3 are occupied as XTAL1 and XTAL2 respectively. When the external oscillator drive circuit is
enabled in capacitor, RC, or CMOS clock mode, Port pin P0.3 is occupied as XTAL2. The Port I/O Cross-
bar should be configured to skip the occupied Port pins; see Section “12.1. Priority Crossbar Decoder”
on page 104 for Crossbar configuration. Additionally, when using the external oscillator circuit in crys-
tal/resonator, capacitor, or RC mode, the associated Port pins should be configured as analog inputs. In
CMOS clock mode, the associated pin should be configured as a digital input. See Section “12.2. Port
I/O Initialization” on page 106 for details on Port input mode selection.
11.3. System Clock Selection
The CLKSL bit in register OSCICN selects which oscillator is used as the system clock. CLKSL must be
set to ‘1’ for the system clock to run from the external oscillator; however the external oscillator may still
clock peripherals (timers, PCA) when the internal oscillator is selected as the system clock. The system
clock may be switched on-the-fly between the internal and external oscillator, so long as the selected oscil-
lator is enabled and has settled. The internal oscillator requires little start-up time and may be enabled and
selected as the system clock in the same write to OSCICN. External crystals and ceramic resonators typi-
cally require a start-up time before they are settled and ready for use as the system clock. The Crystal
Valid Flag (XTLVLD in register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To
avoid reading a false XTLVLD, in crystal mode software should delay at least 1 ms between enabling the
external oscillator and checking XTLVLD. RC and C modes typically require no start-up time.
Rev. 2.9
99
C8051F300/1/2/3/4/5
Parameter
Conditions
Min
Typ
Max
Units
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