參數(shù)資料
型號: DTMFDECODER-RD
廠商: Silicon Laboratories Inc
文件頁數(shù): 35/178頁
文件大?。?/td> 0K
描述: KIT REF DESIGN DTMF DECODER
應用說明: DTMF Decoder Ref Design AppNote
標準包裝: 1
主要目的: 電信,DTMF 解碼器
嵌入式:
已用 IC / 零件: C8051F300
主要屬性: 8kHz 采樣速率模數(shù)轉(zhuǎn)換器
次要屬性: 16 個 Goertzel 濾波器
已供物品: 板,軟件
產(chǎn)品目錄頁面: 627 (CN2011-ZH PDF)
相關產(chǎn)品: 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名稱: 336-1283
Rev. 2.9
13
C8051F300/1/2/3/4/5
1.
System Overview
C8051F300/1/2/3/4/5 devices are fully integrated mixed-signal system-on-a-chip MCUs. Highlighted fea-
tures are listed below. Refer to Table 1.1 on page 14 for specific product feature selection.
High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)
In-system, full-speed, non-intrusive debug interface (on-chip)
True 8-bit 500 ksps 11-channel ADC with programmable gain pre-amplifier and analog multiplexer
(C8051F300/2 only)
Precision programmable 25 MHz internal oscillator
Up to 8 kB of on-chip Flash memory
256 bytes of on-chip RAM
SMBus/I2C and Enhanced UART serial interfaces implemented in hardware
Three general-purpose 16-bit timers
Programmable counter/timer array (PCA) with three capture/compare modules and watchdog timer
function
On-chip power-on reset, VDD monitor, and temperature sensor
On-chip voltage comparator
Byte-wide I/O port (5 V tolerant)
With
on-chip
Power-On
Reset,
VDD monitor, Watchdog Timer, and clock oscillator, the
C8051F300/1/2/3/4/5 devices are truly stand-alone System-on-a-Chip solutions. The Flash memory can
be reprogrammed even in-circuit, providing non-volatile data storage, and also allowing field upgrades of
the 8051 firmware. User software has complete control of all peripherals, and may individually shut down
any or all peripherals for power savings.
The on-chip Silicon Laboratories 2-Wire (C2) Development Interface allows non-intrusive (uses no on-chip
resources), full speed, in-circuit debugging using the production MCU installed in the final application. This
debug logic supports inspection and modification of memory and registers, setting breakpoints, single
stepping, run and halt commands. All analog and digital peripherals are fully functional while debugging
using C2. The two C2 interface pins can be shared with user functions, allowing in-system debugging with-
out occupying package pins.
Each device is specified for 2.7 to 3.6 V operation over the industrial temperature range (–45 to +85 °C).
The Port I/O and RST pins are tolerant of input signals up to 5 V. The C8051F300/1/2/3/4/5 are available in
3 x 3 mm 11-pin QFN or 14-pin SOIC packaging.
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