![](http://datasheet.mmic.net.cn/110000/GT-48002A_datasheet_3491731/GT-48002A_63.png)
Switched Fast Ethernet Controller
Revision 1.2
63
Sniffer (bit 31) (active HIGH)
n/a (bits [30:18])
EASE sample for port 1 (bit 17) (active HIGH)
EASE sample for port 0 (bit 16) (active HIGH)
EASE sample is an original packet to CPU (bit 15) (active HIGH)
Source Channel number (bit 12, 1 - port1; 0 - port0;)
Byte Count (bits [11:1], bit 11 is MSB)
Valid bit (bit 0, active HIGH)
These parameters are written at the end of the packet transfer.
15.6
Error Source Indications
EASE software in the network device must keep track of the last receive error sources and the associated error condi-
tions. The GT-48002A informs the CPU of error source conditions by writing the Error_Source message to a new
Error_Source buffer area in CPU memory. Operations in the Error_Source buffer area are similar to those in the
NEW_ADDRESS, START_OF_PACKET and Intervention buffer areas. There is an Error_Source Base Address Reg-
ister in the GT-48002A in which the CPU writes a pointer to the Error_Source buffer area. The Error_Source buffer area
is able to hold 32 entries. Two types of errors are defined for this procedure: FCS error and frames too long. When the
GT-48002A receives a packet with any of the above conditions, it will generate and write an Error_Source message to
the CPU’s buffer area. The Error_Source message will contain the 48-bit source address of the error packet, the source
port number and an indication of the error type. The CPU may poll the Error_Source buffer area for new messages.
However, the GT-48002A includes a separate bit in the Interrupt Cause register which indicates that the GT-48002A has
written an Error_Source message into the CPU’s memory. An appropriate mask bit is defined in the Interrupt Mask reg-
ister.
CPU Error Source Base Address, Offset: 0x 140050
‘Error_Source’: The data written by the GT-48002A device to the ‘Error_Source’ messages buffer area that contains
information about an Error Source Address. The data format is as follows:
Bi ts
Fi e l d Na m e
Fun cti o n
In iti a l Va l u e
31:8
ErrorSourceBaseAdd
Contains a pointer to the CPU ‘Error_Source’ area. The area
includes 32 entries (2 32-bit words each) for the GT-48002A’s
‘Error_Source’ messages.
0x0
7:0
-
Reserved. Must be 0x0 when written.
-
PCI Bi ts
D escr ipt i o n
Address
[31:8]
[7:3]
[2:0]
ErrorSourceBaseAdd
offset pointer to entry
‘000’
Data 0
[31:3]
[2]
[1]
[0]
MAC address [19:47]
1 - n/a
1 - FCS Error
1 - Over Count Error
Data 1
[31:25]
[24]
[23:19]
[18:0]
reserved
0 - port 0; 1 - port 1;
Device# (bit 23 is MSB)
MAC address [0:18]