參數(shù)資料
型號(hào): ICS1893AFLFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 29/136頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
其它名稱: 1893AFLFT
ICS1893AF, Rev D 10/26/04
October, 2004
124
Chapter 10
DC and AC Operating Conditions
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.11
100M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
Table 10-18 lists the significant time periods for the 100M MII carrier assertion/de-assertion during
half-duplex transmission. The time periods consist of timings of signals on the following pins:
TXEN
TXCLK
CRS
Figure 10-12 shows the timing diagram for the time periods.
Figure 10-12.
100M MII Carrier Assertion/De-Assertion Timing Diagram
(Half-Duplex Transmission Only)
Table 10-18.
100M MII Carrier Assertion/De-Assertion (Half-Duplex Transmission Only)
Time
Period
Parameter
Condi-
tions
Min.
Typ.
Max.
Units
t1
TXEN Sampled Asserted to CRS Assert
0
3
4
Bit times
t2
TXEN De-Asserted to CRS De-Asserted
0
3
4
Bit times
t2
t1
TXEN
TXCLK
CRS
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