參數(shù)資料
型號: ICS1893AFLFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 31/136頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標準包裝: 1,000
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
其它名稱: 1893AFLFT
ICS1893AF, Rev D 10/26/04
October, 2004
126
Chapter 10
DC and AC Operating Conditions
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.13
100M MII Media Independent Interface: Receive Latency
Table 10-20 lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The
time periods consist of timings of signals on the following pins:
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
Figure 10-14 shows the timing diagram for the time periods.
Figure 10-14.
100M MII / 100M Stream Interface: Receive Latency Timing Diagram
Table 10-20.
100M MII / 100M Stream Interface Receive Latency Timing
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
First Bit of /J/ into TP_RX to /J/ on RXD 100M MII
16
17
Bit times
RXCLK
TP_RX
Shown
unscrambled.
RXD
t1
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