參數(shù)資料
型號(hào)： ICS1893AFLFT
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 5/136頁(yè)
文件大?。?/td> 0K
描述： PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝： 1,000
系列： PHYceiver™
類型： PHY 收發(fā)器
規(guī)程： MII
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 48-BSSOP（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 48-SSOP
包裝： 帶卷 (TR)
其它名稱： 1893AFLFT
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ICS1893AF, Rev D 10/26/04
October, 2004
102
Chapter 9
Pin Diagram, Listings, and Descriptions
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
P1CL
3
Input or
Output
PHY (Address Bit) 1 / Collision LED.
For more information on this pin, see Section 6.5, “Status Interface”.
This multi-function configuration pin is:
– An input pin during either a power-on reset or a hardware reset. In
this case, this pin configures the ICS1893AF PHY Address Bit 1.
– An output pin following reset. In this case, this pin provides collision
status for the ICS1893AF.
As an input pin:
This pin establishes the address for the ICS1893AF. When the signal
on this pin is Logic:
– Low, that address bit is set to logic zero.
– High, that address is set to logic one.
As an output pin:
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not detect any
collisions.
– Asserted, this state indicates the ICS1893AF detects collisions.
The ICS1893AF asserts its Collision LED for a period of approximately
70 msec when it detects a collision.
Caution:
This pin must not float. (See the notes at Section 9.2.2,
P2LI
4
Input or
Output
PHY (Address Bit) 2 / Link Integrity LED.
For more information on this pin, see Section 6.5, “Status Interface”.
This multi-function configuration pin is:
– An input pin during either a power-on reset or a hardware reset. In
this case, this pin configures the address of the ICS1893AF PHY
Address Bit 2.
– An output pin following reset. In this case, this pin provides link status
for the ICS1893AF.
As an input pin:
This pins establishes the address for the ICS1893AF. When the signal
on this pin is logic:
– Low, that address bit is set to logic zero.
– High, that address bit is set to logic one.
As an output pin:
When the signal on this pin is:
– De-asserted, this state indicates the ICS1893AF does not have a
link.
– Asserted, this state indicates the ICS1893AF has a valid link.
Caution:
This pin must not float. (See the notes at Section 9.2.2,
Table 9-6.
PHY Address and LED Pins
Pin
Name
Pin
Number
Pin
Type
Pin Description
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參數(shù)描述
ICS1893AFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR)
ICS1893AG 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGI 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGILF 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGLF 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
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