參數(shù)資料
型號: ICS1893AFLFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 34/136頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標準包裝: 1,000
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 帶卷 (TR)
其它名稱: 1893AFLFT
Chapter 10
DC and AC Operating Conditions
ICS1893AF, Rev. D 10/26/04
October, 2004
129
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.16
Reset: Hardware Reset and Power-Down
Table 10-23 lists the significant time periods for the hardware reset and power-down reset. The time
periods consist of timings of signals on the following pins:
REF_IN
RESETn
TXCLK
Figure 10-17 shows the timing diagram for the time periods.
Figure 10-17.
Hardware Reset and Power-Down Timing Diagram
Table 10-23.
Hardware Reset and Power-Down Timing
Time
Period
Parameter
Condi-
tions
Min.
Typ.
Max.
Units
t1
RESETn Active to Device Isolation and Initialization
60
ns
t2
Minimum RESETn Pulse Width
500
40
ns
t3
RESETn Released to TXCLK Valid
35
500
ms
REF_IN
RESETn
t1
t2
t3
TXCLK Valid
Power
Consumption
(AC only)
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