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參數(shù)資料
| 型號(hào)： | ICS1893AFLFT |
| 廠(chǎng)商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 46/136頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | PHYCEIVER LOW PWR 3.3V 48-SSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | PHYceiver™ |
| 類(lèi)型： | PHY 收發(fā)器 |
| 規(guī)程： | MII |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-SSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱(chēng)： | 1893AFLFT |
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Chapter 4
Overview of the ICS1893AF
ICS1893AF, Rev. D 10/26/04
October, 2004
17
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
4.1
100Base-TX Operation
During 100Base-TX data transmission, the ICS1893AF accepts packets from a MAC and inserts
Start-of-Stream Delimiters (SSDs) and End-of-Stream Delimiters (ESDs) into the data stream. The
ICS1893AF encapsulates each MAC/repeater frame, including the preamble, with an SSD and an ESD. As
per the ISO/IEC Standard, the ICS1893AF replaces the first octet of each MAC preamble with an SSD and
appends an ESD to the end of each MAC/repeater frame.
When receiving data from the medium, the ICS1893AF removes each SSD and replaces it with the
pre-defined preamble pattern before presenting the nibbles to its MAC Interface. When the ICS1893AF
encounters an ESD in the received data stream, signifying the end of the frame, it ends the presentation of
nibbles to its MAC Interface. Therefore, the local MAC receives an unaltered copy of the transmitted frame
sent by the remote MAC/repeater.
During periods when MAC frames are being neither transmitted nor received, the ICS1893AF signals and
detects the IDLE condition on the Link Segment. In the 100Base-TX mode, the ICS1893AF transmit
channel sends a continuous stream of scrambled ones to signify the IDLE condition. Similarly, the
ICS1893AF receive channel continually monitors its data stream and looks for a pattern of scrambled ones.
The results of this signaling and monitoring provide the ICS1893AF with the means to establish the integrity
of the Link Segment between itself and its remote link partner and inform its Station Management Entity
(STA) of the link status.
For 100M data transmission, the ICS1893AF MAC Interface is configured to provide a 100M Media
Independent Interface (MII).
4.2
10Base-T Operation
During 10Base-T data transmission, the ICS1893AF inserts only the IDL delimiter into the data stream. The
ICS1893AF appends the IDL delimiter to the end of each MAC frame. However, since the 10Base-T
preamble already has a Start-of-Frame delimiter (SFD), it is not required that the ICS1893AF insert an
SSD-like delimiter.
When receiving data from the medium (such as a twisted-pair cable), the ICS1893AF uses the preamble to
synchronize its receive clock. When the ICS1893AF receive clock establishes lock, it presents the
preamble nibbles to its MAC Interface. The 10M MAC Interface can be configured as either a 10M MII
Interface.
In 10M operations, during periods when MAC frames are being neither transmitted nor received, the
ICS1893AF signals and detects Normal Link Pulses. This action allows the integrity of the Link Segment
with the remote link partner to be established and then reported to the ICS1893AF’s STA.
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| ICS1893BFLFT | PHYCEIVER LOW PWR 3.3V 48-SSOP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1893AFT | 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:1,000 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| ICS1893AG | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| ICS1893AGI | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| ICS1893AGILF | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| ICS1893AGLF | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
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