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| 型號： | intel386 SX |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器) |
| 中文描述： | 32位16位外部數(shù)據(jù)總線和24位外部地址總線CPU（帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器） |
| 文件頁數(shù)： | 29/102頁 |
| 文件大?。?/td> | 1166K |
| 代理商： | INTEL386 SX |
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Intel386
TM
SX MICROPROCESSOR
240187–12
Figure 4.7. Example Descriptor Selection
4.3 Protection
The Intel386 SX Microprocessor has four levels of
protection which are optimized to support a multi-
tasking operating system and to isolate and protect
user programs from each other and the operating
system. The privilege levels control the use of privi-
leged instructions, I/O instructions, and access to
segments and segment descriptors. The Intel386 SX
Microprocessor also offers an additional type of pro-
tection on a page basis when paging is enabled.
The four-level hierarchical privilege system is an ex-
tension of the user/supervisor privilege mode com-
monly used by minicomputers. The user/supervisor
mode is fully supported by the Intel386 SX Micro-
processor paging mechanism. The privilege levels
(PL) are numbered 0 through 3. Level 0 is the most
privileged level.
RULES OF PRIVILEGE
The Intel386 SX Microprocessor controls access to
both data and procedures between levels of a task,
according to the following rules.
D Data stored in a segment with privilege level
p
can be accessed only by code executing at a
privilege level at least as privileged as
p
.
D A code segment/procedure with privilege level
p
can only be called by a task executing at the
same or a lesser privilege level than
p
.
PRIVILEGE LEVELS
At any point in time, a task on the Intel386 SX Micro-
processor always executes at one of the four privi-
lege levels. The Current Privilege Level (CPL) speci-
fies what the task’s privilege level is. A task’s CPL
may only be changed by control transfers through
gate descriptors to a code segment with a different
privilege level. Thus, an application program running
at PL
e
3 may call an operating system routine at
PL
e
1 (via a gate) which would cause the task’s CPL
to be set to 1 until the operating system routine was
finished.
Selector Privilege (RPL)
The privilege level of a selector is specified by the
RPL field. The selector’s RPL is only used to estab-
lish a less trusted privilege level than the current
privilege level of the task for the use of a segment.
This level is called the task’s effective privilege level
(EPL). The EPL is defined as being the least privi-
leged (numerically larger) level of a task’s CPL and a
selector’s RPL. The RPL is most commonly used to
verify that pointers passed to an operating system
procedure do not access data that is of higher privi-
lege than the procedure that originated the pointer.
Since the originator of a selector can specify any
RPL value, the Adjust RPL (ARPL) instruction is pro-
vided to force the RPL bits to the originator’s CPL.
29
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