參數(shù)資料
型號(hào)： K4T1G044QQ-HC(L)E6
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 1Gb Q-die DDR2 SDRAM Specification
中文描述： 1Gb的調(diào)Q DDR2內(nèi)存芯片規(guī)格
文件頁(yè)數(shù)： 2/44頁(yè)
文件大?。?/td> 891K
代理商： K4T1G044QQ-HC(L)E6
K4T1G084QQ
K4T1G164QQ
Rev. 1.01 November 2007
DDR2 SDRAM
2 of 44
K4T1G044QQ
Table of Contents
1.0 Ordering Information ................................................................................................................... 4
2.0 Key Features ................................................................................................................................ 4
3.0 Package Pinout/Mechanical Dimension & Addressing ............................................................ 5
3.1 x4/x8 package pinout (Top View) : 60ball FBGA Package
................................................................... 5
3.2 x16 package pinout (Top View) : 84ball FBGA Package
...................................................................... 6
3.3 FBGA Package Dimension (x4/x8)
................................................................................................... 7
3.4 FBGA Package Dimension (x16)
...................................................................................................... 8
4.0 Input/Output Functional Description ......................................................................................... 9
5.0 DDR2 SDRAM Addressing ........................................................................................................ 10
6.0 Absolute Maximum DC Ratings ................................................................................................ 11
7.0 AC & DC Operating Conditions ................................................................................................ 11
7.1 Recommended DC Operating Conditions (SSTL - 1.8)
...................................................................... 11
7.2 Operating Temperature Condition
................................................................................................. 12
7.3 Input DC Logic Level
................................................................................................................... 12
7.4 Input AC Logic Level
................................................................................................................... 12
7.5 AC Input Test Conditions
............................................................................................................. 12
7.6 Differential input AC logic Level
.................................................................................................... 13
7.7 Differential AC output parameters
................................................................................................. 13
8.0 ODT DC electrical characteristics ............................................................................................ 13
9.0 OCD default characteristics ...................................................................................................... 14
10.0 IDD Specification Parameters and Test Conditions ............................................................. 15
11.0 DDR2 SDRAM IDD Spec Table ................................................................................................17
12.0 Input/Output capacitance ........................................................................................................ 18
13.0 Electrical Characteristics & AC Timing for DDR2-800/667.................................................... 18
13.1 Refresh Parameters by Device Density
......................................................................................... 18
13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
.............................................. 18
13.3 Timing Parameters by Speed Grade
............................................................................................. 19
14.0 General notes, which may apply for all AC parameters ....................................................... 21
15.0 Specific Notes for dedicated AC parameters ........................................................................ 23
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