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參數(shù)資料
| 型號(hào)： | L80227 |
| 廠商： | LSI CORP |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | 10BASE-T/100BASE-TX Ethernet Physical Layer Device (PHY)(10BASE-T/100BASE-TX 以太網(wǎng)物理層處理器) |
| 中文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封裝： | LQFP-64 |
| 文件頁(yè)數(shù)： | 48/158頁(yè) |
| 文件大?。?/td> | 1084K |
| 代理商： | L80227 |
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Draft 6/5/00
2-28
Functional Description
Copyright 1999 by LSI Logic Corporation. All rights reserved.
2.3.10.7 AutoNegotiation Reset
Appropriately setting the AutoNegotiation Reset (ANEG_RST) bit in the
MI serial port Control register can initiate or reset the AutoNegotiation
algorithm at any time.
2.3.11 Link Indication
Receive link detect activity can be monitored two ways:
1.
The link detect bit (LINK) in the MI serial port Status register
indicates link activity when it is set.
2.
The LED output pins can be programmed to indicate link activity.
In the MI serial port Configuration register, set the LED function select
bits (LED_DEF_[1:0]) so that link activity is indicated at the PLED3n or
PLED0n output. Set the PLED3_[1:0] and PLED0_[1:0] bits in the same
register to 0b11 (normal). With these settings, LEDs connected to the
PLED3n and PLED0n pins will reflect link activity.
When either the PLEDn3 or PLEDn0 pins are programmed to be a link
detect output, they are driven LOW whenever the device is in the Link
Pass State. The PLED3n output is open-drain with a pullup resistor and
can drive an LED from V
DD
. The PLEDn0 output has both pullup and
pulldown driver transistors in addition to a weak pullup resistor, so it can
drive an LED from either V
DD
or GND. Both the PLED3n and PLED0n
outputs can also drive another digital input.
See
Section 2.3.13, “LED Drivers,” page 2-31
for more details on how to
program the LED output pins to indicate various conditions.
2.3.12 Collision
Collisions occur whenever transmit and receive operations occur
simultaneously while the device is in Half-Duplex mode.
2.3.12.1 100 Mbits/s
In 100 Mbits/s operation, a collision occurs and is sensed whenever there
is simultaneous transmission (packet transmission on TPO+/-) and
reception (non-idle symbols detected at the TP+/- input). When a
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L80227/B | 制造商:LSI Corporation 功能描述: 制造商:LSI Corporation 功能描述:L80227/B |
| L80227/BI | 制造商:LSI Corporation 功能描述:L80227/BI |
| L80227FR | 制造商:LAUREL ELECTRONICS 功能描述:Laureate 1/8 DIN multi-function counter / timer, universal 85-264 Vac power, two |
| L80227-I | 制造商:LSI Corporation 功能描述:STD CELL ASIC |
| L80227-I-LEADFREE | 制造商:LSI Corporation 功能描述:796000124413 |
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