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參數(shù)資料
| 型號： | LXP730 |
| 廠商： | Intel Corp. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 32/70頁 |
| 文件大?。?/td> | 531K |
| 代理商： | LXP730 |
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LXP730
—
Multi-Rate DSL Framer
32
Datasheet
FELB is on, the framer does not know by itself that its receive scrambler has to be switched.
Switching is accomplished in the LXP730 by setting the REMOTE_LB bit in register 17h. This
also needs to be done when the remote BELB is in operation.
When the remote CPE end switches off the BELB the CO end will not correctly interpret the data
until the REMOTE_LB is turned off. However it will still recognize the FSW because it is not
scrambled.
3.1.4
Using Multiple Devices on an Interrupt Line
The LXP730 INT pin is an output pin and therefore requires a circuit, as shown in
Figure 10
, to
operate with additional devices that share the same interrupt line to the microprocessor. Each
LXP730 that is tied to the shared interrupt line will need its own isolating diode.
Figure 10. Multiple Interrupt Line Circuit
1N4148 or
equivalent
LXP730
INT
1N4148 or
equivalent
LXP730
INT
Interrupt
Line Pull-up
+5V
INT
μ
P
To other
device
interrupt pins
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