IEEE 1149.1 Test Access Port
9-10
MC68307 USER’S MANUAL
MOTOROLA
During the capture-IR controller state, the parallel inputs to the instruction shift register are
loaded with the 4-bit binary value (0001). The parallel outputs, however, remain unchanged
by this action since an update-IR signal is required to modify them.
9.4.1 EXTEST (0000)
The external test (EXTEST) instruction selects the 117-bit boundary scan register. EXTEST
asserts internal reset for the MC68307 system logic to force a predictable benign internal
state while performing external boundary scan operations.
By using the TAP, the register is capable of a) scanning user-defined values into the output
buffers, b) capturing values presented to input pins, c) controlling the direction of bidirec-
tional pins, and d) controlling the output drive of three-state output pins. For more details on
the function and uses of EXTEST, please refer to the IEEE 1149.1 document.
9.4.2 SAMPLE/PRELOAD (0010)
The SAMPLE/PRELOAD instruction selects the 117-bit boundary scan register and pro-
vides two separate functions. First, it provides a means to obtain a snapshot of system data
and control signals. The snapshot occurs on the rising edge of TCK in the capture-DR con-
troller state. The data can be observed by shifting it transparently through the boundary scan
register.
NOTE
Since there is no internal synchronization between the IEEE
1149.1 clock (TCK) and the system clock (CLKOUT), the user
must provide some form of external synchronization to achieve
meaningful results.
The second function of SAMPLE/PRELOAD is to initialize the boundary scan register output
bits prior to selection of EXTEST. This initialization ensures that known data appears on the
outputs when entering the EXTEST instruction.
9.4.3 BYPASS (1111)
The BYPASS instruction selects the single-bit bypass register as shown in
Figure 9-9. This
creates a shift-register path from TDI to the bypass register and, finally, to TDO, circumvent-
ing the 117-bit boundary scan register. This instruction is used to enhance test efficiency
when a component other than the MC68307 becomes the device under test.
Figure 9-9. Bypass Register
1
MUX
1
G1
1 D
C1
CLOCK DR
FROM TDI
0
SHIFT DR
TO TDO