參數(shù)資料
型號(hào): MC68307PU16
廠商: MOTOROLA INC
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, 16.67 MHz, MICROCONTROLLER, PQFP100
封裝: TQFP-100
文件頁(yè)數(shù): 252/264頁(yè)
文件大?。?/td> 949K
代理商: MC68307PU16
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EC000 Core Processor
4-12
MC68307 USER’S MANUAL
MOTOROLA
4.5.1 Exception Vectors
An exception vector is a memory location from which the processor fetches the address of
a routine to handle an exception. Each exception type requires a handler routine and a
unique vector. All exception vectors are two words in length (see Figure 4-5), except for the
reset vector, which is four words long. All exception vectors reside in the supervisor data
space, except for the reset vector, which is in the supervisor program space. A vector num-
ber is an 8-bit number that is multiplied by four to obtain the offset of an exception vector.
Vector numbers are generated internally or externally, depending on the cause of the excep-
tion. For interrupts, during the interrupt acknowledge bus cycle, a peripheral provides an 8-
bit vector number (see Figure 4-6) to the processor on data bus lines D7–D0.
The processor forms the vector offset by left-shifting the vector number two bit positions and
zero-filling the upper-order bits to obtain a 32-bit long-word vector offset. In the EC000 core
this offset is used as the absolute address to obtain the exception vector itself, which is illus-
trated in Figure 4-6.
The actual address on the address bus is truncated to the number of address bits available
on the bus of the particular implementation of the M68000 architecture. In the EC000 core,
this is 24 address bits. The memory map for exception vectors is shown in Table 4-5.
The vector table is 512 words long (1024 bytes), starting at address 0 (decimal) and pro-
ceeding through address 1023 (decimal). The vector table provides 255 unique vectors,
some of which are reserved for trap and other system function vectors. Of the 255, 192 are
reserved for user interrupt vectors. However, the first 64 entries are not protected, so user
interrupt vectors may overlap at the discretion of the systems designer.
4.6 PROCESSING OF SPECIFIC EXCEPTIONS
The exceptions are classified according to their sources, and each type is processed differ-
ently. The following paragraphs describe in detail the types of exceptions and the processing
of each type. The exception vector assignments are listed in Table 4-5.
Figure 4-5. Exception Vector Format
Figure 4-6. Address Translated from 8-Bit Vector Number
NEW PROGRAM COUNTER (HIGH)
NEW PROGRAM COUNTER (LOW)
A1=0
A1=1
WORD 0
WORD 1
EVEN BYTE (A0=0)
EVEN BYTE (A0=1)
ALL ZEROES
V7
V6
V5
V4
V3
V2
V1
V0
A23
A0
A10
0
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