參數(shù)資料
型號: MC68MH360VR33LR2
廠商: Freescale Semiconductor
文件頁數(shù): 22/158頁
文件大?。?/td> 0K
描述: IC MPU QUICC 33MHZ 357-PBGA
標準包裝: 180
系列: M683xx
處理器類型: M683xx 32-位
速度: 33MHz
電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 357-BBGA
供應商設備封裝: 357-PBGA(25x25)
包裝: 帶卷 (TR)
QMC Supplement
9.2 MSC Microcode Operation
In normal operation (without the MSC microcode), the QMC protocol allows specic bits
in an 8-bit time slot to be masked to create a single subchannel per SCC. A problem arises
when multiple subchannels are multiplexed within a single time slot as in GSM (global
system for mobile communications) where four 16-Kbps subchannels are multiplexed into
a single 64-Kbps channel over a 2.048-Mbps A bis link. A brute-force solution routes the
separate subchannels to different SCCs, consuming all four SCCs for the single TDM link
as shown in Figure 9-1. Each SCC lters out one of the four 2-bit subchannels in time slot 2
(TS2) using a unique mask located in its time slot assignment tables (TSATRx/TSATTx).
With the MSC microcode, subchannels can be regenerated using only one SCC.
Figure 9-1. Two-Bit Subchannel Implementation without MSC Microcode
The MSC microcode enables an 8-bit time slot to be split into multiple, bit-resolution
subchannels. The microcode applies user-dened masks in a time slot assignment table
entry to subdivide a given channel. Bit 11 of a table entry is now called the L bit to mark
the last subchannel of a given time slot. Figure 9-2 shows the MSC microcode solution to
the above GSM problem. Again in this example, time slot 2 contains four 2-bit channels,
but now the full time slot can be routed to a single SCC and split into subchannels within
the time slot assignment tables.
TS0
TS1
TS2
TS31
8 Bits
SCC1
SCC2
SCC4
SCC3
Masking performed within each SCC to create 2-bit channels
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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