參數(shù)資料
型號: ML9050
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays
中文描述: 132通道液晶內(nèi)置液晶點陣顯示RAM的驅(qū)動程序
文件頁數(shù): 12/71頁
文件大?。?/td> 472K
代理商: ML9050
Semiconductor
ML9050/9051
12/71
PEDL9050-02
Display data RAM
Display data RAM
This is the RAM storing the dot data for display and has an organization of 65 (8 pages
8 bits
+1)
132 bits. It is possible to access any required bit by specifying the page address and the
column address. Since the display data D7 to D0 from the MPU corresponds to the LCD display
in the direction of the common lines as shown in Fig. 3, there are fewer restrictions during display
data transfer when the ML9050/9051 is used in a multiple chip configuration, thereby making
it easily possible to realize a display with a high degree of freedom. Also, since the display data
RAM read/write from the MPU side is carried out via an I/O buffer, it is done independent of
the signal read operation for the LCD drive. Consequently, the display is not affected by
flickering, etc., even when the display data RAM is accessed asynchronously during the LCD
display operation.
D0
D1
D2
D3
D4
0 1 1 1 - - - 0
1 0 0 0 - - - 0
0 0 0 0 - - - 0
0 1 1 1 - - - 0
1 0 0 0 - - - 0
Display data RAM
COM0
COM1
COM2
COM3
COM4
- - -
- - -
- - -
- - -
- - -
LCD Display
Fig. 3
Page address circuit
The page address of the display data RAM is specified using the page address set command as
shown in Fig. 4. Specify the page address again when accessing after changing the page. The
page address 8 (D3, D2, D1, D0
1, 0, 0, 0) is the RAM area dedicated to the indicator, and only
the display data D0 is valid in this page.
Column address circuit
The column address of the display data RAM is specified using the column address set command
as shown in Fig. 4. Since the specified column address is incremented (by +1) every time a display
data read/write command is issued, the MPU can access the display data continuously. Further,
the incrementing of the column address is stopped at the column address of 83H. Since the
column address and the page address are independent of each other, it is necessary, for example,
to specify separately the new page address and the new column address when changing from
column 83H of page 0 to column 00H of page 1. Also, as is shown in Table 4, it is possible to reverse
the correspondence relationship between the display data RAM column address and the
segment output using the ADC command (the segment driver direction select command). This
reduces the IC placement restrictions at the time of assembling LCD modules.
Table 4
ADC
D0 = "0"
D0 = "1"
SEG Output
Column Address
¨
Column Address
¨
83(H)
0(H)
0(H)
83(H)
SEG131
SEG0
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