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參數(shù)資料
| 型號(hào)： | ML9050 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays |
| 中文描述： | 132通道液晶內(nèi)置液晶點(diǎn)陣顯示RAM的驅(qū)動(dòng)程序 |
| 文件頁數(shù)： | 9/71頁 |
| 文件大?。?/td> | 472K |
| 代理商： | ML9050 |
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Semiconductor
ML9050/9051
9/71
PEDL9050-02
FUNCTIONAL DESCRIPTION
MPU Interface
Selection of interface type
The ML9050/9051 carries out data transfer using either the 8-bit bi-directional data bus (D7 to
D0) or the serial data input line (SI). Either the 8-bit parallel data input or serial data input can
be selected as shown in Table 1 by setting the P/
S
pin to the "H" or the "L" level.
Table 1
P/
S
CS1
CS1
CS1
CS2
CS2
CS2
A0
A0
A0
RD
RD
—
WR
WR
—
C86
C86
—
D7
D7
SI
D6
D6
SCL
D5 to D0
D5 to D0
(HZ)
H: Parallel input
L: Serial input
A hyphen (—) indicates that the pin can be tied to the "H" or the "L" level.
Parallel interface
When the parallel interface is selected, (P/
S
= "H"), it is possible to connect this LSI directly to the
MPU bus of either an 80-series MPU or a 68-series MPU as shown in Table 2 depending on
whether the pin C86 is set to "H" or "L".
Table 2
P/
S
CS1
CS1
CS1
CS2
CS2
CS2
A0
A0
A0
RD
E
RD
WR
R/
W
WR
D7 to D0
D7 to D0
D7 to D0
H: 68-Series MPU bus
L: 80-Series MPU bus
The data bus signals are identified as shown in Table 3 below depending on the combination of
the signals A0,
RD
(E), and
WR
(R/
W
) of Table 2.
Table 3
Common 68-Series
A0
1
1
0
0
80-Series
RD
0
1
0
1
R/
W
1
0
1
0
WR
1
0
1
0
Display data read
Display data write
Status read
Control data write (command)
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