- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄377973 > ML9050 (OKI SEMICONDUCTOR CO., LTD.) 132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays PDF資料下載
參數(shù)資料
| 型號(hào)： | ML9050 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays |
| 中文描述： | 132通道液晶內(nèi)置液晶點(diǎn)陣顯示RAM的驅(qū)動(dòng)程序 |
| 文件頁(yè)數(shù)： | 3/71頁(yè) |
| 文件大小： | 472K |
| 代理商： | ML9050 |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)
Semiconductor
ML9050/9051
3/71
PEDL9050-02
PIN DESCRIPTION
Function
Pin name
Number
of pins
8
Description
MPU
Interface
I/O
I/O
D0 to D7
This is an 8-bit bi-directional data bus that can be connected to an 8-bit
or 16-bit standard MPU data bus. When a serial interface is selected (P/
S
= "L"):
D7: Serial data input pin (SI)
D6: Serial clock input pin (SCL)
In this case, D0 to D5 will be in the Hi-Z state. D0 to D7 will all be in the
Hi-Z state when the chip select is in the inactive state.
Normally, the lowest bit of the MPU address bus is connected and used
for distinguishing between data and commands.
A0 = "H": Indicates that D0 to D7 is display data.
A1 = "L": Indicates that D0 to D7 is control data.
Initial setting is made by making
RES
= "L". The reset operation is made
during the active level of the RES signal.
These are the chip select signals. The Chip Select of the LSI becomes
active when
CS1
is "L" and also CS2 is "H" and allows the input/output of
data or commands.
The active level of this signal is "L" when connected to an 80-series MPU.
This terminal is connected to the
RD
signal of the 80-series MPU, and the
data bus of the ML9050/9051 goes into the output state when this signal
is "L".
The active level of this signal is "H" when connected to a 68-series MPU.
This pin will be the Enable and clock input pin when connected to a 68-
series MPU.
The active level of this signal is "L" when connected to an 80-series MPU.
This terminal is connected to the
WR
signal of the 80-series MPU. The
data on the data bus is latched into the ML9052 at the rising edge of the
WR
signal.
When connected to a 68-series MPU, this pin becomes the input pin for
the Read/Write control signal.
R/
W
= "H": Read, R/
W
= "L": Write
This is the pin for selecting the MPU interface type.
C86 = "H": 68-Series MPU interface.
C86 = "L": 80-Series MPU interface.
1
I
A0
1
I
RES
2
I
CS1
CS2
1
I
RD
(E)
1
I
WR
(R/
W
)
1
I
C86
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ML9051 | 132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays |
| ML9060 | 1/2 DUTY, 160-OUTPUT STATIC LCD DRIVER |
| ML9090-01 | LCD Driver with Key Scanner and RAM(帶鍵掃描和RAM的LCD驅(qū)動(dòng)器) |
| ML9090-02 | LCD Driver with Key Scanner and RAM(帶鍵掃描和RAM的LCD驅(qū)動(dòng)器) |
| ML9092-01 | LCD Driver with Key Scanner and RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML9051 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays |
| ML9051G | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays |
| ML9055A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:LCD Controller/Driver |
| ML9055A-02 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:LCD Controller/Driver |
| ML9055A-02DVVAZ01L | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:LCD Controller/Driver |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。