參數(shù)資料
型號: ML9050
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays
中文描述: 132通道液晶內(nèi)置液晶點(diǎn)陣顯示RAM的驅(qū)動(dòng)程序
文件頁數(shù): 16/71頁
文件大?。?/td> 472K
代理商: ML9050
Semiconductor
ML9050/9051
16/71
PEDL9050-02
Fig. 5(b) Waveforms in the line reversal drive method
When the ML9050/9051 is used in a multiple chip configuration, it is necessary to supply the
slave side display timing signals (FR, CL, and
DOF
) from the master side.
The statuses of the signals FR, CL, and
DOF
are shown in Table 5.
Table 5
Operating mode
Internal oscillator circuit enabled (CLS = H)
Internal oscillator circuit disabled (CLS = L)
Internal oscillator circuit enabled (CLS = H)
Internal oscillator circuit disabled (CLS = L)
FR
CL
DOF
Output
Output
Input
Input
Master mode (M/
S
= "H")
Output
Output
Input
Input
Output
Input
Input
Input
Slave mode (M/
S
= "L")
RAM
DATA
V
SS
V5
COM1
V2
V1
V
SS
V4
SEGn
V3
V1
V
SS
V5
COM0
V2
V1
64 65
1
2
3
4
5
6
60 61 62 63 64 65
1
2
3
4
5
6
LCDCK
(display clock)
FR
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