參數資料
型號: ML9050
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 132-Channel LCD Driver with Built-in RAM for LCD Dot Matrix Displays
中文描述: 132通道液晶內置液晶點陣顯示RAM的驅動程序
文件頁數: 4/71頁
文件大小: 472K
代理商: ML9050
Semiconductor
ML9050/9051
4/71
PEDL9050-02
Function
Pin name
Number
of pins
1
Description
MPU
Interface
I/O
I
P/
S
"H"
"L"
Data/command
A0
A0
Data
D0 to D7
SI (D7)
Read/Write
RD
,
WR
Write only
Serial clock
M/
S
CLS
DOF
FRS
FR
CL
Power
supply circuit
Enabled
Enabled
Disabled
Disabled
Oscillator
circuit
Enabled
Disabled
Disabled
Disabled
"H"
"H"
"L"
"H"
"L"
Output
Output
Input
Input
Output
Output
Output
Output
Output
Output
Input
Input
Output
Input
Input
Input
"L"
SCL (D6)
P/
S
This is the pin for selecting parallel data input or serial data input.
P/
S
= "H": Parallel data input.
P/
S
= "L": Serial data input.
The pins of the LSI have the following functions depending on the state of
P/
S
input.
When P/
S
is "L", D0 to D5 will go into the Hi-Z state. In this condition,
the data on the lines D0 to D5 can be "H", "L", or open. The pins
RD
(E)
and
WR
(R/
W
) should be tied to either the "H" level or the "L" level.
During serial data input, it is not possible to read the display data in the
RAM.
This is the pin for selecting whether to enable or disable the internal
oscillator circuit for the display clock.
CLS = "H": The internal oscillator circuit is enabled.
CLS = "L": The internal oscillator circuit is disabled (External input).
When CLS = "L", the display clock is input at the pin CL.
This is the pin for selecting whether master operation or slave operation
is made towards the ML9050/9051. During master operation, the
synchronization with the LCD display system is achieved by inputting the
timing signals necessary for LCD display.
M/
S
= "H": Master operation
M/
S
= "L": Slave operation
The functions of the different circuits and pins will be as follows
depending on the states of M/
S
and CLS signals.
Oscillator
circuit
1
I
CLS
Display
timing
generator
circuit
1
I
M/
S
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