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參數(shù)資料
| 型號： | P83CL882 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 Ultra Low Power ULP telephony controller |
| 中文描述： | 80C51的超低功耗無鉛汽油電話控制器 |
| 文件頁數(shù)： | 54/88頁 |
| 文件大小： | 328K |
| 代理商： | P83CL882 |
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2001 Jun 19
54
Philips Semiconductors
Product specification
80C51 Ultra Low Power (ULP) telephony controller
P83CL882
6.8.6.6
Serial Control Register (S1CON)
This 8-bit SFR is used by the microcontroller to control the
generation of START and STOP conditions, enable the
interface, control the generation of ACKs, and to select the
clock frequency.
6.8.6.7
Serial Status Register (S1STA)
The status decoder takes all of the internal status bits and
compresses them into a 5-bit code. This code is unique for
each I
2
C-bus status. The 5-bit code may be used to
generate vector addresses for fast processing of the
various service routines.
Each service routine processes a particular bus status.
There are 26 possible bus states if all four modes of SIO1
are used. The 5-bit status code is latched into the five most
significant bits of the status register when the serial
interrupt flag is set (by hardware) and remains stable until
the interrupt flag is cleared by software. The three least
significant bits of the Serial Status Register are always
zero. If the status code is used as a vector to service
routines, then the routines are displaced by eight address
locations. Eight bytes of code should be sufficient for most
of the service routines.
handbook, full pagewidth
MBC749 - 1
SLAVE ADDRESS
S1ADR
GC
SHIFT REGISTER
S1DAT
SDA
ARBITRATION LOGIC
SCL
BUS CLOCK GENERATOR
S1STA
I
7
6
5
4
3
2
1
0
S1CON
7
6
5
4
3
2
1
0
Fig.24 Block diagram of I
2
C-bus serial I/O.
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