參數(shù)資料
型號(hào)： PI7C8150BMAE
廠商： Pericom
文件頁(yè)數(shù)： 63/109頁(yè)
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE ASYNC 208-FQFP
標(biāo)準(zhǔn)包裝： 24
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-FQFP（28x28）
包裝： 管件
安裝類(lèi)型： 表面貼裝
產(chǎn)品目錄頁(yè)面： 1227 (CN2011-ZH PDF)
PI7C8150B
ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
Page 57 of 109
April 2009 – Revision 1.08
Primary Detected
Parity Error Bit
Transaction Type
Direction
Bus Where Error
Was Detected
Primary/
Secondary Parity
Error Response
Bits
1
Delayed Write
Downstream
Primary
x / x
0
Delayed Write
Downstream
Secondary
x / x
0
Delayed Write
Upstream
Primary
x / x
0
Delayed Write
Upstream
Secondary
x / x
X = don’t care
Table 6-2 shows setting the detected parity error bit in the secondary status register,
corresponding to the secondary interface. This bit is set when PI7C8150B detects a parity
error on the secondary interface.
Table 6-2. Setting Secondary Interface Detected Parity Error Bit
Secondary
Detected
Parity
Error Bit
Transaction Type
Direction
Bus Where Error
Was Detected
Primary/
Secondary Parity
Error Response
Bits
0
Read
Downstream
Primary
x / x
1
Read
Downstream
Secondary
x / x
0
Read
Upstream
Primary
x / x
0
Read
Upstream
Secondary
x / x
0
Posted Write
Downstream
Primary
x / x
0
Posted Write
Downstream
Secondary
x / x
0
Posted Write
Upstream
Primary
x / x
1
Posted Write
Upstream
Secondary
x / x
0
Delayed Write
Downstream
Primary
x / x
0
Delayed Write
Downstream
Secondary
x / x
0
Delayed Write
Upstream
Primary
x / x
1
Delayed Write
Upstream
Secondary
x / x
X = don’t care
Table 6-3 shows setting data parity detected bit in the primary interface’s status register.
This bit is set under the following conditions:
PI7C8150B must be a master on the primary bus.
The parity error response bit in the command register, corresponding to the primary
interface, must be set.
The P_PERR_L signal is detected asserted or a parity error is detected on the primary
bus.
Table 6-3. Setting Primary Interface Master Data Parity Error Detected Bit
Primary
Data
Parity Bit
Transaction Type
Direction
Bus Where Error
Was Detected
Primary /
Secondary Parity
Error Response
Bits
0
Read
Downstream
Primary
x / x
0
Read
Downstream
Secondary
x / x
1
Read
Upstream
Primary
1 / x
0
Read
Upstream
Secondary
x / x
0
Posted Write
Downstream
Primary
x / x
0
Posted Write
Downstream
Secondary
x / x
1
Posted Write
Upstream
Primary
1 / x
0
Posted Write
Upstream
Secondary
x / x
0
Delayed Write
Downstream
Primary
x / x
0
Delayed Write
Downstream
Secondary
x / x
1
Delayed Write
Upstream
Primary
1 / x
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參數(shù)描述
PI7C8150BMAI 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
PI7C8150BMAI-33 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:ASYNCHRONOUS 2-PORT PCI-TO-PCI BRIDGE
PI7C8150BMAIE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 2 Port 32B PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150BMAIE-33 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 2 Port 32B PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8150BND 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 2-Port 32-Bit PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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