參數(shù)資料
型號(hào)： PM7351-BI
廠商： PMC-SIERRA INC
元件分類： 數(shù)字傳輸電路
英文描述： OCTAL SERIAL LINK MULTIPLEXER
中文描述： ATM/SONET/SDH SUPPORT CIRCUIT, PBGA304
封裝： 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304
文件頁數(shù)： 54/174頁
文件大?。?/td> 1790K
代理商： PM7351-BI
RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
44
uplink. Flow control is required to ensure fair access to the up-link, to minimize
cell loss and to minimize the impact of greedy users on others.
By its very nature, the upstream and downstream flow control implemented by
the S/UNI-VORTEX can only be explained in the context of an overall system,
including the role played by the eight S/UNI-DUPLEX devices connected to the
S/UNI-VORTEX. Therefore, the reader is referred to a companion document
provided by PMC-Sierra titled
S/UNI-VORTEX & S/UNI-DUPLEX TECHNICAL
OVERVIEW
. The document number is PMC-981025 and it can be obtained by
one of the various means described on the last page of this document.
For the remainder of this data sheet we will focus on describing cell buffering and
flow control as it is implemented by the S/UNI-VORTEX.
9.3.1 Downstream Traffic Flow Control
The S/UNI-VORTEX has 33 one cell deep buffers for each of the 8 downstream
LVDS links. In the Section 9.1.1 on Page 29 we describe how the S/UNI-
VORTEX responds to bus polling and asserts the TPA signal when another cell
can safely be written into one of these downstream cell buffers. Now we will
describe how, on a per link basis, the S/UNI-VORTEX schedules cells out of
these 33 cell buffers and transmits them on their LVDS link. We describe an
individual link here, but the reader is reminded that there is no scheduling
interaction or interdependence among the 8 LVDS links – each has its own 33
cell buffer and each has its own scheduler.
Downstream scheduling only occurs when the previous cell has been fully
transmitted over the downstream link. In other words, once a cell (data or stuff
cell) has been scheduled the entire cell is sent before another cell can be
scheduled. When there is no buffered data in any of the 33 buffers the S/UNI-
VORTEX generates a stuff cell and sends it on the link. A stuff cell meets all the
requirements of a standard data cell, including valid system overhead
information, but stuff cells are discarded by the far-end receiver.
When there are one or more non-empty buffers, the S/UNI-VORTEX must
decide which of the far-end channels (up to 32 PHYs and the microprocessor
port) should have its buffered cell scheduled onto the downstream link. This
decision consists of two steps: first any channel that is presenting a far-end
buffer full status (described below) is eliminated from this scheduling round. If all
far-end channels have full buffers a stuff cell is generated automatically.
Otherwise, a simple round robin algorithm is used among the remaining eligible
channels to share the downstream link fairly and schedule the next cell to be
sent.
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